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HBM ClipX Bedienungsanleitung Seite 117

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be stopped and the FIFO memory read out. Depending on the control flag
bits 1 and 2, further recording takes place afterwards.
Signal sources for all 6 possible FIFO channels must be defined. If a
channel is not needed, an existing signal source can be used.
How the FIFO works
At first every millisecond is checked whether bit 8 of the FIFO control flags is
set. If so, start date and time as well as an entry (all signal sources) are
recorded and waited for the next millisecond. Otherwise, depending on bit 0, the
system either starts immediately or - with bits 1 and 2 - waits for a condition to
occur at a later point in time. As soon as the specified condition is fulfilled for the
first time, the start also occurs at bits 1 and 2.
In the next millisecond after the start, the specified recording rate (number of
values per second) is observed first, before the digital conditions (flags) are
checked with the value to be used then. The system then checks whether differ-
ence conditions are specified and whether one of these conditions is fulfilled.
Only then an entry is made in the FIFO (time and all signal sources).
FIFO control flags
Set the control flags to 0 to stop recording and clear the active fill mode.
Bit
Explanation for bit set
0
Fill trigger mode for continuous filling
values per second. Recording starts immediately with the specified number
of values per second, taking into account any differential conditions.
1
Fill trigger mode for status-controlled filling
digital flags determines the filling, see
tus)" on page
the bits is set and an active difference condition is fulfilled.
ClipX
162. Filling is active if the result is not 0, i.e. if at least one of
A04643_04_X00_03 HBM: public
Operation via Ethernet/OPC UA
1)
of the FIFO with the set number of
1)
of the FIFO. The bit mask of the
"Digital flags: List of I/O flags (I/O sta-
115

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