Sharp SF-2052 Serviceanleitung Seite 207

Pin No. Signal name
u A11
v
A12
w
A13
é A14
â A15
ä
A16
à
A17
å A18
ç A19
ê
DTWHPS
ë
DTBHPS
è
WDTout
ï
WDTin
î RESET
ì POFA
Ä GND2
Å
X2
É (9.83MHz)
æ +5V (C)
Æ AS
ô
RD
ö WR
ò PPD2
û GND2
ù
+5V (Pull up)
ÿ +5V (Pull up)
Ö +5V (Pull up)
Ü
Vref
¢ THS
£ PWS
¥
TNCS
¤
PLS
ƒ PCS
á DMS
í
AEDS
ó
AES
ú GND2
ñ GND2
Ñ
DCH
ª
E
º CV_COUNT
¿ CLCLOCK
"
GRID
" MHVG
TxD_ADF
101
RxD_ADF
102
TBFM
103
GND2
104
I0
105
I1
106
I2
107
I3
108
I4
109
I5
110
I6
111
I7
112
Port In/Out
A11
OUT
A12 OUT
A13 OUT
A14
OUT
A15
OUT
P50/A16 OUT
P51/A17
OUT
P52/A18
OUT
P53/A19
OUT
P13/WAIT OUT
P12/BREQ
OUT
P11/BACK OUT
P10 IN
RES IN
NMI
IN
Vss
IN
EXTAL IN
XTAL IN
Vcc
IN
AS
OUT
RD
OUT
WR/HWR
OUT
P17/LWR
OUT
MD0
IN
MD1
IN
MD2
IN
STBY
IN
AVcc IN
P70/AN0
IN
P71/AN1
IN
P72/AN2 IN
P73/AN3 IN
P74/AN4
IN
P75/AN5
IN
P76/AN6 IN
P77/AN7
IN
AVss
IN
AVss
IN
P57/ADTRG OUT
P56/E
OUT
P54/IRQ0
OUT
P60/PW0
OUT
P61/PW1 OUT
P62/PW2
OUT
P63/TXD
OUT
P64/RXD
IN
P65/SCK
OUT
Vss
IN
P110
IN
P111
IN
P112
IN
P113
IN
P114
IN
P115
IN
P116
IN
P117
IN
H/L
Address bus A11
H/L
H/L Address bus A12
H/L Address bus A13
Address bus A14
H/L
Address bus A15
H/L
H/L Address bus A16
Address bus A17
H/L
Address bus A18
H/L
Address bus A19
H/L
H/L Duplex alignment plate home position detection
Duplex rear edge plate home position detection
H/L
"H" ↑
Watch dog timer out
"H" Trouble Watch dog timer monitor
L Reset input
Power OFF sequence trigger interruption
L
CPU power (0V), signal GND
—
— CPU basic clock, crystal oscillator
CPU power (+5V)
—
Address strobe
L
Read
L
Write
L
PPD2 ON detection
H
Operation mode control
L
Mode 6: 8-bit expansion maximum mode
H
H
Hardware standby input (+5V pulled up)
L
— Analog power (+4.75V)
Thermistor input (Fusing)
—
Manual feed width detection input
—
— Toner density input
— Manual feed paper length detection
Process control sensor input
—
Drum marking sensor input
—
— Optical system dirt detection
AE sensor input
—
Analog power (0V), signal GND
—
Analog power (0V), signal GND
—
H Power OFF sequence trigger (RESET trigger)
Enable clock output (NC)
Pulse
Copy finish count signal
H
Copy lamp clock
"L" PWM
"H" PWM Grid out
Main charger output
H
Serial out (ADF)
"L" START
Serial in (ADF)
"L" START
TBFM output (NC)
H/L
CPU power (0V), signal GND
—
Matrix input I0
H/L
Matrix input I1
H/L
Matrix input I2
H/L
Matrix input I3
H/L
Matrix input I4
H/L
Matrix input I5
H/L
Matrix input I6
H/L
Matrix input I7
H/L
12 – 4
Description