Sharp SF-2052 Serviceanleitung Seite 208

(2) CPU input signal matrix
7
PPD2
P1
DCH
P5
—
P6
AES
P7 (A/D Port)
IN
RxD_RIC
P8
HWAK PLUS
DWMB/
P9
DBMB/
P10
17
P11
BLBE0
P12
(3) I/0.1 (IC122) signal list
Pin No. Signal name
1
PF6
2 PF7
3 Y Vcc
,
4
PE0
5 PE1
6 PE2
7
PE3
8
PE4
9 PE5
F
PE6
G PE7
H ^ v VSS
, ,
I
PB0
J PB1
K PB2
L
PB3
M PB4
N
PB5
O PB6
P PB7
Q
PA7
R PA6
S
PA5
T PA4
U
PA3
V PA2
W
PA1
X PA0
Z RD
[
WR
\ CS
]
RESET
_ A2
' A1
a
A0
b D0
6 5
— —
E_OUT —
OUT
— TBFM
AEDS DMS in
(A/D Port) (A/D Port)
IN IN
TxD_RIC RxD_SOT
OUT IN
DWMA/ DWMB
DBMA/ DBMB
16 15
BLLATCH BLDATA
Port In/Out
AEGAIN1
OUT
AEGAIN2
OUT
5V (C)
IN
RES_OP
OUT
RES_MIR
OUT
RES_ADF
OUT
RES_SOT OUT
RTS_RIC OUT
AEDSGAIN0
OUT
AEDSGAIN1 OUT
AEDSGAIN2
OUT
GND2 IN
CPFC1 OUT
CPFC2
OUT
CPFC3 OUT
CPFC4 OUT
CPFS1
OUT
CPFS2
OUT
CPFS3
OUT
CPFS4
OUT
EXOUT3 OUT
EXOUT4
OUT
EX3
OUT
HLC2 OUT
HLC1
OUT
HL2 OUT
HL1
OUT
RD IN
WR IN
I/O1CS
IN
RESET
IN
A2
IN
A1
IN
A0
IN
D0
IN/OUT
4 3
— DTWHPS
CV_COUNT(P) A19
OUT
RxD_ADF TxD_ADF
IN OUT
PCS in PLS
(A/D Port) (A/D Port)
IN IN
TxD_SOT RxD_MIR
OUT IN
DWMA PPD3
DBMA PFCin
14 13
BLCLOCK CIinh
H/L
AE sensor gain 1
H/L
AE sensor gain 2
H/L
Power source (+5V)
—
Sleeve reset (for the operation panel)
"H"
Sleeve reset (for mirror control)
"H"
Sleeve reset (for RADF)
"H"
"H" Sleeve reset (For sorter)
— Request to send (For RIC)
AEDS sensor gain 0
H/L
H/L AEDS sensor gain 1
AEDS sensor gain 2
H/L
— Power (0V), signal GND
"H" No. 1 cassette paper feed clutch
No. 2 cassette paper feed clutch
"H"
"H" No. 3 cassette paper feed clutch
"H" No. 4 cassette paper feed clutch
No. 1 cassette paper feed solenoid
"H"
No. 2 cassette paper feed solenoid
"H"
No. 3 cassette paper feed solenoid
"H"
No. 4 cassette paper feed solenoid
"H"
H/L Extra output 3
Extra output 4
H/L
Extra 3
H/L
(Not use)
"H" Heater lamp (Sub 2)
Heater lamp (Main 2)
"H"
"H" Heater lamp (Sub 1)
Heater lamp (Main 1)
"H"
"L" Read signal
"L" Write signal
Chip select input
"L"
Reset input
"H"
Address bus A2
H/L
Address bus A1
H/L
Address bus A0
H/L
Data bus D0
H/L
12 – 5
2 1
DTBHPS WDTout
A18 A17
OUT OUT
MHVG GRID
(PWN Port)
OUT
TNCS PWS
(A/D Port) (A/D Port)
IN IN
TxD_MIR RxD_OP
OUT IN
BIAS SHVG
(PWM) (PWM)
OUT OUT
BLTin RRCin
IN
12 11
SC SB
Specification
0
WDTin
A16
OUT
CLCLOCK
(PWN Port)
OUT
THS
(A/D Port)
IN
TxD_DP
OUT
THVG
(PWM)
OUT
FWS
IN
10
SA