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5. LCD display circuit
(1) Block diagram
TC
Counter
AUD
REARY
Card
COPY
counter
CA
PNC
+10V
Main
GND2
PWB
+5V
+24V
GND1
RXD-OP
DSR-OP
Driver
TXD-OP
DTR-OP
IC422
RES-OP
LATCH
CLK
BEO
Driver
DATA
IC410
OP
PWB
KEY IN
IC402
IC409
Q401
CCFT
Inverter
+5VLCD
-24VLCD
LCD
S
unit
CP1
Buffer
CP2
D0
D1
IC420
D2
D3
(2) CPU (IC411) µPD78217AGC-AB
1
General
The CPU sends and receives date to/from the main circuit and the
operation circuit through the serial data communication line, and con-
trols the display system.
Operation
Copier
control PWB
main circuit
Display
data output
Key input
LCD controller
data input
Counter
Card counter
Data I/O
Driver
IC409
Driver
IC422
Driver
IC409
RD
A0 ~ A19
D0 ~ D7
CPU
IC403
5VREM
+24VOP
Q504
+10V
-20VREM
IC427
Q503
-20V
Q402
IC430
Operation PWB
LED display data input
Key inputdata output
CPU
LCD display
Original
detection
DC PS PWB
+5V -20V GND2 +24VOP +10V
DATA
ROM
IC411
CS
PRO-
GRAM
ROM
CS
IC410
LCD
controller
IC429
IC405
MCLK
Timing
DCLK
section
A17
CS
IC508
ASTB
IC504
LC-RES
IC503
IC510
IC507
IC509
2
Pin arrangement
P64/RD
P63/A19
P62/A18
P61/A17
P60/A16
RESET
X2
X1
VSS
P57/A15
P56/A14
P55/A13
P54/A12
P53/A11
P52/A10
P51/A9
12 – 12
D0 ~ D7
A0 ~ A15
Buffer
A0 ~ A12
IC418
IC404
IC503
MCLK
Buffer
IC419
IC426
MCLK
G-ROM
Latch
MD0 ~ MD15
CG
IC408
-ROM
IC428
IC414
IC501
1
2
3
4
5
6
7
8
µPD78217AGC-AB
9
10
11
12
13
14
15
16
A-RAM
V-RAM
Buffer
IC506
IC416
IC505
IC412
IC502
IC406
WR
CS
Latch
IC417
IC413
IC407
P71/AN1
48
47
P72/AN2
46
P73/AN3
45
P74/AN4
44
P75/AN5
43
AVREF
42
AVSS
41
VDD
40
EA
39
P33/SO/SB0
38
P32/SCK
37
P31/TXD
36
P30/RXD
35
P27/SI
34
P26/INTP5
33
P25/INTP4
/ASCK
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