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When any abnormal signal enters the circuit, all the bits are cleared.
Then the operation starts from the first bit again.
When data of more than 16 bits (17 pulse or more) are inputted, it is
judged as an abnormal signal and all the bits are cleared. Then the
operation begins from the first bit again.
The 15 bit data assignment is as shown below:
C
C
C
C
C
C
C
C
1
2
3
4
5
6
7
System address
Data
C6
C7 C8
C9 C10 C11 CH C6 C7
1
0
0
0
0
0
1
0
0
0
1
1
0
0
0
0
0
1
0
0
1
0
1
0
0
0
1
1
0
0
1
1
1
0
0
0
0
0
1
0
1
0
0
1
0
0
1
0
1
0
1
1
0
1
0
0
0
1
1
0
1
0
1
1
0
0
1
1
1
0
1
1
1
1
0
C
Data expansion C12, C13
These are set with the switches and used to expand com-
mands.
D
Data judgment K (Refer to *2.)
The last bit is for judgement of data transmission system.
Date is transmitted as follows by using this bit.
*2: Data judgment
The data are not reversed in this case.
(a) Normal signal
0
0
0
0
0
1
(b) Reverse signal
0
0
0
0
0
0
When the data judgment bit is "0," normal signals are transmit-
ted. When it is "1," the reverse signals of C0 ~ C14 and K are
transmitted.
64ms
Normal signal
As shown above, normal signals and reverse signals are re-
peated in series in a certain cycle. In the receiver side, judgment
between normal and reverse signals is performed with the data
judgement bit to form data properly.
E
Check bit C14
C14 is fixed to GND in the LSI and no pin is provided in the
package.
C
C
C
C
C
C
K
8
9
10
11
12
13
14
Judgement
Check
Expansion
C8 C9 C10 C11 CH C6
0
1
0
0
0
0
0
2
1
0
0
0
0
3
0
1
0
0
0
4
1
1
0
0
0
5
0
0
1
0
0
6
1
0
1
0
0
7
0
1
1
0
0
8
1
1
1
0
0
9
0
0
0
1
0
10
1
0
0
1
0
11
0
1
0
1
0
12
1
1
0
1
0
13
0
0
1
1
0
14
1
0
1
1
0
15
0
1
1
1
0
1
0
1
0
0
1
0
1
0
1
0
1
1
0
1
64ms
Reverse signal
Normal signal
A
*1: System address
This bit is set to prevent against malfunction in wireless commu-
nication with other devices (VTR, TV, etc.). For this time, com-
munication is made through wires and there is no need to set
this bit. Set to "0."
B
C7 C8
1
0
16
1
1
1
0
17
0
0
1
0
18
1
0
1
0
19
0
1
1
0
20
1
1
1
0
21
0
0
1
0
22
1
0
1
0
23
0
1
1
0
24
1
1
1
0
25
0
0
1
0
26
1
0
1
0
27
0
1
1
0
28
1
1
1
0
29
0
0
1
0
30
1
0
(3) System configuration
1
2
9
1 0
1 7
1 8
2 5
2 6
3 3
3 4
0
4 1
4 2
4 9
5 0
1
When command [3] is sent, for example, press the key at the inter-
section between K0 and S2. The 15 bit data at that time is as follows:
[3] 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0
System address bit
12 – 10
System address (Refer to *1.) C1, C2, C3, C4, C5
These data are set with the switches and assigned depend-
ing on the system. 56 channels and 2 bit expansion are
available for sending commands for one system.
Data C6, C7, C8, C9, C10, C11
These data are assigned with the key input. Commands
corresponding to C6 ~ C11 are as shown below:
C9 C10 C11 CH C6 C7
1
1
1
0
31
0
0
0
0
1
32
1
0
0
0
1
33
0
0
0
0
1
34
1
0
0
0
1
35
0
1
0
0
1
36
1
1
0
0
1
37
0
1
0
0
1
38
1
1
0
0
1
39
0
0
1
0
1
40
1
0
1
0
1
41
0
0
1
0
1
42
0
1
0
1
43
1
1
0
1
44
1
1
0
1
45
S 7
2
1 3 0 3 5 3 4 3 3 3 2 3 1
3
4
5
6
7
8
K0
6
1 1
1 2
1 3
1 4
1 5
1 6
K1
7
1 9
2 0
2 1
2 2
2 3
2 4
K2
8
2 7
2 8
2 9
3 0
3 1
3 2
K3
9
3 5
3 6
3 7
3 8
3 9
4 0
K4
1 1
4 3
4 4
4 5
4 6
4 7
4 8
K5
1 2
5 1
5 2
5 3
5 4
5 5
5 6
K6
1 3
22
Key matrix
CIIU OSCI
Data bit
C8 C9 C10 C11 CH
1
1
1
0
1
1
1
1
0
1
0
0
0
1
1
0
0
0
1
1
1
0
0
1
1
1
0
0
1
1
0
1
0
1
1
0
1
0
1
1
1
1
0
1
1
1
1
0
1
1
0
0
1
1
1
S 6
S 5
S 4
S 3
S2
S1
S0
C 1
14
C 2
System
15
C 3
address
16
C 4
17
set circuit
C 5
18
Data
C12
25
C13
expansion
26
set circuit
Y D D
2 0
2 1
2 4
O SC O
O U T
46
47
48
49
50
51
52
53
54
55
56
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