Inhaltsverzeichnis
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4 Hardware-Installation
Anschlussbelegung NP5 ET1100 EtherCAT ASIC ET1100 :
ET1100 Ethercat ASIC
M9
TX_ENA(0)-S3
TX_D0(0)/C25_ENA-S3
M8
TX_D1(0)-S3
TX_D2(0)/C25_SHI[0]-S3
M7
TX_D3(0)/C25_SHI[1]-S3
M10
RX_ERR_ISO(0)-S3
M11
RX_DV_CONFIG2(0)-S3
L10
RX_CLK_B-CAST_OFF(0)-S3
K10
RX_D0_DUPLEX(0)-S3
M12
RX_D1_PHYAD2(0)-S3
L11
RX_D2_PHYAD1(0)-S3
L12
RX_D3_PHYAD0(0)-S3
LINK_MII_SPEED(0)-S3
J11
CLK_MODE[0]
J12
LINKACT(0)/P_CONFIG[0]
M3
TX_ENA(1)-S3
TX_D0(1)/TRANS_MODE_ENA-S3
M2
TX_D1(1)-S3
TX_D2(1)/P_MODE[0]-S3
M1
TX_D3(1)/P_MODE[1]-S3
RX_ERR_ISO(1)-S3
M4
RX_DV_CONFIG2(1)-S3
RX_CLK_B-CAST_OFF(1)-S3
RX_D0_DUPLEX(1)-S3
M5
RX_D1_PHYAD2(1)-S3
RX_D2_PHYAD1(1)-S3
M6
RX_D3_PHYAD0(1)-S3
LINK_MII_SPEED(1)-S3
CLK_MODE[1]
LINKACT(1)/P_CONFIG[1]
H1
100
R5
CLK_25MHZ-S3
PHYAD_OFF
P_CONFIG[2]
K11
MI_CLK/LINKPOL-S3
K12
MI_DATA-S3
H2
D2
D1
+3.3V
ET1100 Device Configuration
+3.3V
RUN_LED/EEPROM_SIZE
4k7
R6
LINKACT(0)/P_CONFIG[0]
4k7
R7
LINKACT(1)/P_CONFIG[1]
4k7
R8
PHY0_LINKACT_LED-S3
330
R9
PHY1_LINKACT_LED-S3
330
R10
Version: 1.5.0 / FIR-v2213
IC2
TX_ENA(0)/EBUS(0)-TX+
L8
TX_D(0)[0]/C25_ENA
TX_D(0)[1]/EBUS(0)-TX-
L7
TX_D(0)[2]/C25_SHI[0]
TX_D(0)[3]/C25_SHI[1]
RX_ERR(0)
RX_DV(0)/EBUS(0)-RX-
RX_CLK(0)
RX_D(0)[0]
RX_D(0)[1]/EBUS(0)-RX+
RX_D(0)[2]
RX_D(0)[3]
L9
LINK_MII(0)
PERR(0)/TRANS(0)/CLK_MODE[0]
LINKACT(0)/P_CONF[0]
TX_ENA(1)/EBUS(1)-TX+
L3
TX_D(1)[0]/TRANS_MODE_ENA
TX_D(1)[1]/EBUS(1)-TX-
L2
TX_D(1)[2]/P_MODE[0]
TX_D(1)[3]/P_MODE[1]
L6
RX_ERR(1)
RX_DV(1)/EBUS(1)-RX-
K4
RX_CLK(1)
L4
RX_D(1)[0]
RX_D(1)[1]/EBUS(1)-RX+
L5
RX_D(1)[2]
RX_D(1)[3]
K3
LINK_MII(1)
K2
PERR(1)/TRANS(1)/CLK_MODE[1]
L1
LINKACT(1)/P_CONF(1)
F1
TX_ENA(2)/EBUS(2)-TX+
E1
TX_D(2)[1]/EBUS(2)-TX-
J1
RX_D(2)[1]/EBUS(2)-RX+
RX_DV(2)/EBUS(2)-RX-
F2
LINK_MII(2)/CLK25OUT1
C3
PERR(2)/TRANS(2)/PHYAD_OFF
E3
LINKACT(2)/P_CONF[2]
MI_CLK/LINKPOL
MI_DATA
K1
PDI[39]/RX_D(2)[3]
J2
PDI[38]/RX_D(2)[2]
RUN/EEPROM_SIZE
PDI[37]/RX_D(2)[0]
G2
PDI[36]/RX_CLK(2)
SYNC/LATCH[1]
G1
PDI[35]/RX_ERR(2)
SYNC/LATCH[0]
E2
PDI[34]/TX_D(2)[0]/CTRL_STATUS_MOVE
PDI[33]/TX_D(2)[2]
PDI[32]/TX_D(2)[3]
EEPROM_DATA
C1
PDI[31]/CLK25OUT2
C2
PDI[30]/LINKACT(3)/P_CONF(3)
B1
PDI[29]/RX_D(3)[1]/EBUS(3)-RX+
B2
PDI[28]/PERR(3)/TRANS(3)
A1
PDI[27]/RX_DV(3)/EBUS(3)-RX-
A2
PDI[26]/TX_ENA(3)/EBUS(3)-TX+
B3
PDI[25]/TX_D(3)[0]
A3
PDI[24]/TX_D(3)[1]/EBUS(3)-TX-
B4
PDI[23]/TX_D(3)[2]
PDI[7]/CPU_CLK
A4
PDI[22]/TX_D(3)[3]
B5
PDI[21]/LINK_MII(3)
A5
PDI[20]/RX_D(3)[3]
B6
PDI[19]/RX_D(3)[2]
A6
PDI[18]/RX_D(3)[0]
B7
PDI[17]/RX_CLK(3)
A7
PDI[16]/RX_ERR(3)
ET1100
TX_D0(0)/C25_ENA-S3
TX_D2(0)/C25_SHI[0]-S3
TX_D3(0)/C25_SHI[1]-S3
TX_D2(1)/P_MODE[0]-S3
TX_D3(1)/P_MODE[1]-S3
TX_D0(1)/TRANS_MODE_ENA-S3
MI_CLK/LINKPOL-S3
Nanotec Electronic GmbH
Kapellenstr. 6
D-85622 Feldkirchen b. München
C5
VCC_IO
D3
VCC_IO
J10
VCC_IO
K5
VCC_IO
K8
VCC_IO
D10
VCC_IO
F3
VCC_IO(T0)
+3.3V
E9
VCC_IO
H9
VCC_IO(T3)
F10
VCC_IO
J3
VCC_IO
C6
VCC_CORE
C7
VCC_CORE
K6
VCC_CORE
K7
VCC_CORE
G10
VCC_PLL
G9
GND_PLL
D6
GND_CORE
J6
GND_CORE
J7
GND_CORE
D7
GND_CORE
D4
GND_IO
D5
GND_IO
J5
GND_IO
J8
GND_IO
J9
GND_IO
K9
GND_IO(T2)
F9
GND_IO
J4
GND_IO
H4
GND_IO(T1)
D9
GND_IO
E4
RES.[0]
G3
RES.[1]
G4
RES.[2]
E10
RES.[3]
C8
RES.[4]
H10
RES.[5]
F4
C8
22p
RES.[6]
Q1
D8
RES.[7]
G12
25MHz/20ppm
OSC_IN
F12
OSC_OUT
C9
22p
C4
RBIAS
H3
R22
12k
TESTMODE
H12
RESET
PHY_RESET-S3
H11
RUN_LED/EEPROM_SIZE
E12
E11
G11
EEPROM_CLK
I2CSCL_CANRX-S1
F11
I2CSDA_CANTX-S1
B8
PDI[15]
A8
PDI[14]
B9
PDI[13]
A9
PDI[12]
C9
PDI[11]
A10
PDI[10]
PHY1_YELLOW_LED-S3
B10
R23
330
PDI[9]
PHY0_YELLOW_LED-S3
A11
R24
330
PDI[8]
ERROR_LED
B11
R25
330
A12
PDI[6]
SLOT_SPI_SCK-S1
C10
PDI[5]
B12
PDI[4]
COMM_SYNC-S1
C11
PDI[3]
COMM_SPI_MISO-S1
C12
PDI[2]
COMM_SPI_MOSI-S1
D11
PDI[1]
COMM_SPI_CS-S1
D12
PDI[0]
COMM_SPI_SCK-S1
P_CONFIG[2]
4k7
R11
4k7
R12
4k7
R13
4k7
R14
CLK_MODE[0]
4k7
R15
CLK_MODE[1]
4k7
R16
4k7
R17
4k7
R18
4k7
R19
PHYAD_OFF
4k7
R20
1k
R21
NP5_ETHERCAT
06.06.2017 16:59
NP5_REF_ETHERCAT (003)
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