List Of Illustrations - Tektronix DC 5010 Anleitung

"--
Fig.
No.
2-1
2-2
2-3
2-4
2-5
2-6
2-7
2-8
2-9
2-1 0
2-1 1
4- 1
4-2
4-3
4-4
4-5
L
4-6
5-1
5-2
5-3
5-4
5-5
LIST OF ILLUSTRATIONS
Page
DC 501 0 Programmable Universal
Coutnter/Timer
Plug-in installation and removal
. . . . . . . . .
2-2
DC 501 0 front panel display, controls and
connectors..
. . . . . . . . . . . . . . . . . . . . . . . .
2-3
Advantages in signal attenuation
. . . . . . . .
2-8
Typiical triggering levels and sources of trig-
geri~ng errors
. . . . . . . . . . . . . . . . . . . . . . . .
2-1 0
Measurement examples for WIDTH A and
TIME A
+
B
. . . . . . . . . . . . . . . . . . . . . . . . .
2-1 1
Measurement example for synchronous in-
put signals.
. . . . . . . . . . . . . . . . . . . . . . . . .
2-1 1
Measurement example, EVENTS B
DURING A.
. . . . . . . . . . . . . . . . . . . . . . . . .
2-12
Measurement example for risetime.
. . . . . .
2-13
Examples of arming
. . . . . . . . . . . . . . . . . .
2-1 5
Quick command list.
. . . . . . . . . . . . . . . . . .
2-1 7
ASCII and IEEE 488 (GPIB) code chart
. . .
2-41
Performance Check setup for step 3
. . . . .
4-3
Performance Check setup for steps 4 and 7 4-4
Performance Check setup for steps 5 and 14 4-5
Performance Check setup for step 6
. . . . .
4-7
Performance Check setup for steps 8, 9, 10,
11,12,and13
. . . . . . . . . . . . . . . . . . . . . . .
4-9
Performance Check setup for step 15
. . . .
4-1 3
Circuit boards removal and replacement
. .
5-3
Method of removing magnetic latch relay
. . . . . . . . . . . . . . . . . . . . . . . . .
armature.. 5-4
Typ~ical square pin assembly.
. . . . . . . . . . .
5-5
Bottom entry circuit board pin socket
. . . .
5-6
Orientation and disassembly of multipin
conmectors..
. . . . . . . . . . . . . . . . . . . . . . . .
5-6
Fig.
No. Page
5-6 Right rear interface connector assignments 5-7
5-7 Left rear interface connector assignments
.
5-8
5-8 Rear GPIB interface connector assignments 5-8
5-9 Bus address and message terminator
switches..
. . . . . . . . . . . . . . . . . . . . . . . . . .
5-9
. . . .
5-1 0 Kernel signature analysis connections 5-12
NOTE
The following illustrations are located in the diagrams
section at the rear of this manual.
Analog Board (A1 2).
Auxiliary Board (A1 8).
Adjustment setup for steps 10 and 11.
Adjustment setup for steps 12 and 13.
General troubleshooting flow chart.
lnternal signature analysis "A" (Digital
Board).
lnternal signature analysis "B" (Digital
Board).
lnternal signature analysis (Analog Board).
lnternal signature analysis (Auxiliary Board).
Kernel signature analysis (Digital Board).
Kernel signature analysis (GPIB Board).
Analog board (A1 2).
Digital board (A1 6).
Auxiliary board (A1 8).
Display board (A1 0).
GPIB board (A14).
REV DEC 1982