Tektronix DC 5010 Anleitung Seite 251

Theory
of
Operation-DC 50 1 0
Table 3-3
DC 501 0 MEMORY ADDRESS RANGES
Hexadecimal
Address Range
$0000
-
$007F
$0080
-
$0087
$0400
-
$04FF
$0700
-
$070F
$0800
-
$OFFF
$1 000
-
$1 FFF
$COO0
-
$COFF
$E000
-
$EFFF
$FOOO
-
$FFFF
Comments
U1311 (128 X 8 RAM)
U 131 3 (Front panel display,
Serial data latches, and GPIB
address switches)
U1311 (256 X 8 RAM)
U1410 1 1 0 '
U1410(2 k X 8 ROM)
U1610 (4 k X 8 ROM)
U1210 (256 X 8 RAM)
U1102 (4 k X 8 ROM)
U1201 (4 k X 8 ROM)
See Table 3-4.
Memory select decoders U 1 31 3, U 1 420 and related com-
ponents, operate to select the proper memory device during
program control.
The inputloutput sections internal to U1410 are acces-
sed by the microprocessor using address bits A0 through
A3 for specific control of the internal functions. See Table
3-4.
NOTE
Due to the complexity of the internal functions associ-
ated with U 14 10, a detailed description of this device
will not be attempted in this manual. If more detailed
information is needed, refer to the manufacturer's
data sheets.
Address Bits
Serial Data Path. The serial data path is shown on the
block diagram (see Figs. 8-6 and 8-7). Serial data are writ-
ten, via pins 38 and 40 of U1410, to five serial-to-parallel
shift registers located on the Auxiliary circuit board (A18
assembly), and one serial-to-parallel shift register on the
Analog board (A1 2) assembly. This is done when the micro-
processor sets the instruments internal circuits for the de-
sired function. These registers are, in sequence:
A18- U1010 7
A18-U1020 7
A18-U1222 6
A18-U1220 6
A18-U1221 6
A12-U1200 3
The serial data output from A1 2
-
U1200 then goes, via
P I 102-6 (Diagram 3), to five parallel-to-serial shift registers
(Channel A and Channel B accumulators) located on the
Digital circuit board (A16 assembly). Serial data are shifted
through these registers and returned to the microprocessor
via the data buffer, U1310B. Serial data are read from the
following parallel-to-serial shift registers:
A l 6 - U1122 4
A16-U1211 4
A16- U1312 4
A16-U1121 4
A l 6 - U l l l 4 4
Pin 40 of U1410 serves both as an input and output for
serial data. When the microprocessor is in the serial write
mode, pin 40 is configured as an output and bytes of infor-
mation are loaded into the internal serial data registers of
U1410. They are then shifted out serially to the shift regis-
ters on the A1 2 assembly (Analog board). During the writing
of serial data the three-state data buffer, U1310B, is dis-
abled with a high level on pin 15, preventing the serial data
Table 3-4
ADDRESS CODE FOR U l 4 l O
Internal Functions
Port A
Port B
Read Lower CounterIWriter Lower Latch
Read Upper CounterIWriter Upper Latch and Download
Write Lower Latch
Write Upper Latch
Serial Data Register
lnterrupt Flag Register
lnterrupt Enable Register
Auxiliary Control Register
Peripheral Control Register
Data Direction Register
-
Port A
Data Direction Register
-
Port B
REV OCT 1981