A8/D8 Psu - Hitachi CL32W30TAN Wartungshandbuch

INTERCONNECTION BLOCK DIAGRAM

A8/D8 PSU

From switch on the A.C. voltage is rectified by the bridge D900 which produces approximately 300V across C918. This is then
applied to the collector of Q903 via the primary winding of T900. Initially the voltage on pin 7 of I900 will rise to approximately 16V
via R901, D929 and Q905. This allows the internal circuitry of IC900 to generate a sawtooth waveform at pin 4, from which a
squarewave output is obtained at pin6. This output is applied to the gate of Q901 which turns on and off, this alters the voltage on
the emitter of Q903 causing this device to turn on and off, generating the outputs in the secondary windings of T900.
After initial power up of I900 pin 7 is supplied from the bias winding (pin 18) of T900 via D911 for continued operation. The bias
winding voltage is also rectified by D922 which is then supplied to the base of Q905 low via R908/Q906/R924 turning Q905 off, this
is done to reduce the power dissipated by R901 once the power supply is running.
A current sense circuit consisting of R910, R939, R922 and R980 feeds back a voltage to pin 3 of I900, MAX voltage approximately
0.8V. Should the applied voltage exceed the reference the pulse width is limited from output pin 6. In this way Q903 is offered
protection from changes in primary current.
R909 and C914 act as a soft start circuit, this limits the pulse width output from pin 6 during the initial start up period, allowing a
gradual rise to full power.
Q909, R918 and associated circuitry are for reducing the frequency of the power supply when the set is in standby.
A sense voltage rectified by D922 consisting of R905 and R906, supplied pin 2 of I900, this is then compared to an internal
reference voltage. If it exceeds the internal reference the output from pin 6 will be limited by the internal error amp. Z907 will go
short if the +B exceeds 180V.
The secondary voltage induced in T900 winding 7/9 is rectified by D950, producing the H.T. voltage which is smoothed by C977. In
standby the H.T. rises slightly.
Winding 5/10 produces approximately 10V via D951, which is smoothed by C957. This is then applied to dual DC-DC converters
(+8V, +5V out). A control ramp is found on pin 2/6 I900. This ramp is formed by R944/C935, and terminated by Z913, D902, R934
network. Ramp frequency is clamped to the main PSU frequency by the winding on pin 5 T900. This ramp is compared with the
feedback level from I902 (+5) I904 (+8). The reference device monitors the output and changes the DC level to pin 5. The ramp
crosses the dc feedback level ,and the output at pins 1/7 goes low. The output at pins 1/7 starts high at the beginning of the ramp
,goes low at ramp cross level. This action via Q910, Q911 controls the pulse width and so the regulation of the +8/ +5v rails by. The
output pulse width changes with load to maintain the correct Regulating voltage.
The output of I910 pins 1,7 are buffered to improve switching losses using a push pull transistor network Q929, Q917 (for +5V). This
transistor network gives fast edge switching of Q912 (+5) and Q911 (+8V). Over current protection is provided with the current
sense resistor RP03. Network Q956 RP04/C966 pull pin 10 of I903 high if high load current is flowing through RP03.
66