Hitachi CL32W30TAN Wartungshandbuch Seite 41

COMMON INTERFACE REGISTERS.
STATUS REGISTER
0 CD1 Card detect 1
1 CD2 Card detect 2
2 VS1 Voltage select 1 Determines voltage for CIS read/operation
3 VS2 Voltage select 2 used as MCLKO in CA
4 IRQ Controls card insertion/removal interrupt
5 X
6 X
7 X
CONTROL REGISTER 0
0 Vcc5En Selects 5V for PC Card supply
1 Vcc3En Selects 3.3V for PC Card supply
2 En0 Programming volts control
3 En1 Programming volts control
4 TsAB Transport stream A or B select
5 X
6 R/route Route Ts to CA card
7 X
CONTROL REGISTER 1
0 Reset PC Card RESET input
1 Int PC card interrupt
2 I/face Enables the PC Card Command & Control Interface
3 Reg Enables REG# cycle
4 I/O Selects I/O interface
5 S/cyc Enables 35ns WAIT cycle (else 100ns WAIT) (short cycle)
6 X
7 X
CONFIGURATION
0 PLL select line 0
1 PLL select line 1
2 PLL select line 2
3 X
4 X
5 X
6 X
7 X
X = Dont care
The status register reflects the state of the interface with the CI module itself for the CPU to monitor, bits 5, 6, 7 are tied low within
the device configuration and will therefore always read '0'. The control registers 0 and 1 allow the CPU to set the functionality of the
devices, for instance, to re-route the transport stream through the CI module if appropriate. The 'don't care' bits (X) should be written
with a value of '0' at initialisation. The configuration register is included as a second means for the CPU to verify the correct
programming of the internal logic and to set the audio PLL output frequency. Bits 3 - 7 are allocated for configuration verification and
are not used (set to zero). Bits 0 - 2 are used to carry the audio PLL set-up values (FS0 - FS2) for which the initialisation value is 6
corresponding to audio at 48kHz rate.
The CI controller ICs will initially be powered from 5V direct, but will superceded by 3.3V parts in future. Except for the changes to
the local power supply (information following), the change is invisible to the system. If the 3.3V devices are used the voltage
regulator IC205 and it's associated components (C275, C246) should be fitted, and R279 by-pass omitted, while for 5V devices
R279 only should be fitted and the regulator omitted. All output logic is 3V3, but is 5V compliant. The logic thresholds are all TTL.
TRANSPORT STREAM ROUTING
The CI controller ICs allow the transport stream routing (bits 4 and 6 of Control register 0) to either be in by-pass mode (direct to the
demux IC), or through the CI socket and the CA card (and return) if one has been inserted (bits 0 and 1 Status reg.).
CI A has the provision to accept two transport stream inputs so that it may be used as a transport routing device at some time in the
future if necessary.
CONTROL AND COMMAND INTERFACE
This allows bi-directional data transfer and control interface between the CPU and the CA card inserted so that the CPU can
communicate with the CI controller IC and hence an inserted CA module and set up transport stream routing, decryption, software
upgrade etc. This is performed by 8 bit read/write cycles controlled by the internal logic of the CI controller IC and monitored by the
CPU checking the relative bits in the control registers.
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