Hitachi CL32W30TAN Wartungshandbuch Seite 33

The Z02201 provides comprehensive and flexible tone generation and detection. This includes all tones required to establish a
circuit connection and to set-up and control a communication session. The tone generation furnishes the DTMF tones for PTSN auto
dialling, and the supervisory tones for call establishment.
The Z02201 communicates with the controller via a parallel interface, and also allows retrieval of modem/line status, control data
and programmable coefficients.
The controller Z02205 communicates to the MPEG processor via a 5V RS232 interface, using the Hayes AT command set.
The Z02205 controls the registers and memory of the data pump via a parallel interface, allowing DTMF dialling, circuit connection,
and data transfer.
The Z02205 controls the Off-hook line to the DAA, and checks the cadence of the Ringing detect pulses for a valid ringing signal
which is communicated to the MPEG processor.
The DTR and CTS signal lines on PL809 (provisions to and from the modem) are tied low with resistor links (R781, R782) to allow
the TTL level RS232 communication to operate between the modem and CPU without handshakes being needed.
TEST POINTS ON COFDM PCB
Test Point ID Net Name
A001 5v tuner
A002 9v tuner
A003 9v
A090 30v
A009 30v tuner
A235 30v
A234 30v
A006 RF AGC in
A004 IF 1 in / out
A008 IF 2 out
A011 IF2 in
A013 ADD
A018 RF AGC out
A033 Tuner out-07
A032 Tuner out-05
A031 Tuner out-04
A030 Tuner out-03
A029 Tuner out-02
A028 Tuner out-01
A027 Tuner out-00
TP803 Clock out
A239 18MHz Clock-in
A005 SDA-Tuner
A012 SCL-Tuner
A238 SDA-Tuner-SW
A237 SCL-Tuner-SW
TP801 /Clock-EN
A236 CONTROL
A026 18MHz-Clock
TP802 IC800 spare gate
TP891 IC800 spare gate
A231 10 Bit-ADC
A050 INT-ADC
A051 10 Bit-ADC
A047 10 Bit-ADC
A063 REF-TF
A080 REF-TF
TP804 STBYAD10
TP805 ENDA10
TP876 DRVss
A194 3v3-COFDM
TP877 EX-AD9
TP878 EX-AD8
TP879 EX-AD7
TP880 EX-AD6
TP881 EX-AD5
TP882 EX-AD4
TP883 EX-AD3
Function
filtered 5V supply to tuner
filtered 9V supply to tuner
unfiltered 9V supply to tuner
unfiltered 30V supply to tuner
filtered 30V supply to tuner
1st intermediate 30V current limiting point
2nd intermediate 30V current limiting point
RF AGC line tuner front can
IF1 IN/OUT loop through
IF2 OUT front can
IF2 IN rear can
Tuner I2C address select
RF AGC OUT rear can
Tuner ADC data out bit 7
Tuner ADC data out bit 5
Tuner ADC data out bit 4
Tuner ADC data out bit 3
Tuner ADC data out bit 2
Tuner ADC data out bit 1
Tuner ADC data out bit 0
Unused 18 MHz clock out from tuner
18 MHz clock to OFDM
Tuner I2C data
Tuner I2C clock
Ungated tuner I2C data
Ungated tuner I2C clock
active low 18.288 MHz clock enable
18.288 MHz clock enable
unused gate IC800
unused gate IC800
3V3 COFDM supply line
External ADC data bit 9/ tuner ADC data bit 7 link through
External ADC data bit 8/ tuner ADC data bit 6 link through
External ADC data bit 7/ tuner ADC data bit 5 link through
External ADC data bit 6/ tuner ADC data bit 4 link through
External ADC data bit 5/ tuner ADC data bit 3 link through
External ADC data bit 4/ tuner ADC data bit 2 link through
External ADC data bit 3/ tuner ADC data bit 1 link through
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