Hitachi CL32W30TAN Wartungshandbuch Seite 46

Having extracted the information to identify the service components video and audio components are buffered ready to pass onto
the AV chip to be decoded. The data components (MHEG, teletext, etc.) are removed from the transport stream and decoded in the
DRAM area using the appropriate software resource, e.g. bitmap expansion.
The video and audio components are passed onto the AV chip on the AV bus, this is as described in the AV chip section. The AV
chip can respond to the AV video and audio request signals by arranging to pass the data when requested, this should not normally
be needed.
The demux section also has the capability to separate PES streams which can be output through the parallel interface to the
IEEE1394 section (this IEEE1394 section is not currently supported in either software or hardware).
Data for the graphical images which are sent as objects in and decoded from the transport stream packets is passed onto the AV
chip over the E-BUS as data in burst mode.
JTAG TEST CAPABILITY
The CPU/demux chip has JTAG test capability. It can be configured either as part of a 'one loop' or 'two loop' test system with some
of the other chips on the PCB, more details are given in the 'JTAG testing' section later.
AV PROCESSOR IC (L64105)
The chip uses the main system clock at 27MHz from one output of the clock buffer IC.
The video and audio signals are sent from the demux IC to the AV chip on the AV bus. This is made up of:
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8 bit wide data
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Video sample valid
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Audio sample valid
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Video sample request
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Audio sample request
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Error line
The E-BUS is used by the CPU to control the AV chip and to pass graphic image bitmaps which are to be displayed.
The data is made up of mixed audio and video samples identified by the 'valid' signals. The system should run such that a steady,
but not constant, audio and video data stream is passed from the demux to the AV chip. If the data is not being sent quickly enough,
signalled by the AV chip buffer contents falling below a certain level the 'request' lines can indicate this information back to the CPU
to request more data of that type to prevent the AV chip stalling.
The chip is capable of decoding one moving video picture and one audio service (mono, stereo or dual mono) from the packet
information sent on the AV bus from the demux IC at any time. The packets are decoded into defined buffer areas in memory and
the decoding readout rate is controlled by the timing signals contained in the signal (SCR, PCR, DTS, PTS). The video image
information should be available for playout to the video encoder at a constant rate of 25 frames/sec for PAL.
The AV chip also carries out the audio-video synchronisation using the timing information carried in the transport stream and the
packet headers. This ensures good lipsync at all times.
The AV memory area (32Mb of SDRAM) is used to 'build' the full video image, made up of information which has been decoded
from the video packet data and any graphics which have been generated by the CPU, e.g. menus, MHEG graphics, etc. The
graphics can either be presented as a full screen 'graphics only' or as an overlay on the video using various levels of transparency.
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