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5.2.9 Synchronization
Selection
no
with SSI clock
5.3 SSI special bits
It can be defined max. 8 parallel special bits and max. 8 SSI special bits, the default
setting is "Logical 0V".
The number of SSI special bits is dependent on the chosen SSI settings and the sent
number of clocks. In the SSI protocol the special bits are added after the LSB-data bit.
In the following the possible functions for the special bits are indicated.
5.3.1 Parity
The parity bit serves as control bit for the error detection during SSI data
transmissions.
The parity represents the checksum of the position data bits in the SSI data word. If
the SSI data word contains an odd number of "1", the special bit Even Parity = "1" and
supplements the checksum to even parity. Therefore the Parity or Error Parity special
bit must always be defined at the last digit. It is calculated from all previous position
data bits.
5.3.2 UP / DOWN
This is a combination of direction indicator and zero-speed monitoring. The special bit
is set when the position moves in the corresponding direction and is deleted once it
has remained unchanged for 50 milliseconds.
To suppress vibrations, the movement detection has a hysteresis and is one step
referred to the resolution of the central disk. After a reversal of the direction of
movement, at least a distance corresponding to the hysteresis must be traveled before
a movement or change in the direction of movement is signalized.
5.3.3 Damping zone
If the magnet reaches the damping zone in the setting "damping zone = 1" the
special bit is set to "1" and in the setting "damping zone = 0" the special bit is set to
"0".
Printed in the Federal Republic of Germany
12/09/2019
Description
position calculation / -output according to the internal cycle
position calculation is synchronized to the SSI clock
TR - ELA - BA - DGB - 0022 - 09
TR-Electronic GmbH 2014, All Rights Reserved
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