Faulty Ssi Query; Troubleshooting; Biss C Interface (Bml-S1G0-B - Balluff BML-S1G0-B7-M5E-0-S284 Serie Betriebsanleitung

BML-S1G0-B/S7_ _-M5E_-_0-(SA26-)S284
Absolute Magnetically Coded Position Measuring System
6
Interfaces (continued)
6.1.3

Faulty SSI query

Underclocking
If there are too few clock edges, the current data level will
be maintained for the time t
m
from CLK. If, however, another positive edge occurs within
the t time, the next bit will then be output. If the t
m
has elapsed, a timeout event will take place internally, the
data output goes to low and then to high after the t
has elapsed. The high level is maintained until the next
clock burst.
Overclocking
If there are too many clock edges, the data output will
switch to low after the correct number of cycles has been
completed. The t timer is started again for every
m
additional negative edge from Clk and the T
internally. Data switches back to high after the time t
elapsed.
Clocking too fast
If the clock rate f is too high, the error bit is set and
clk
output with the LED sequence (see section 8).
6.1.4

Troubleshooting

The position measuring system can output up to 8 errors
and 8 warnings. The 16 messages are displayed through
various colors (LED off, red, green, orange) and LED
flashing sequences (see section 3.3.1 on page 7).
Only the data is transmitted from the measuring system to
the controller. No additional information can be transmitted
(such as register communication with BiSS C).
Error bit position/logics in the SSI data set:
At the beginning of each data set, an error bit and one or
three null bits are transmitted, followed by the position data
beginning with the MSB. The error bit is transferred as
active high, i.e. if no error has occurred, this bit is low. If
the error event is no longer present, it is transmitted once
and then deleted.
The temporal signal sequence is shown in Fig. 6-1
on page 16.
www.balluff.com
after the last negative edge
time
m
time
m
event is set
m
has
m
6.2 BiSS C interface
(BML-S1G0-B...)
For further information,
see: www.biss-interface.com/
The data output of the BML must be loaded
with 120 Ω, otherwise incorrect measurements
may result.
With the BiSS C interface, both position data and register
data can be transmitted bi-directionally. The register data
is transmitted parallel to the position data and has no
effect on the system's measuring behavior. The Balluff
BiSS C sensor heads can be connected to the controller
via a point-to-point connection. The BiSS interface is
compatible to the SSI interface in terms of hardware.
Transmission is CRC-secured, i.e. the controller can check
if the data was received correctly. If the transmission has
failed, the data can be discarded and requested again.
Transmission offers the following options:
– An error and a warning bit are also transmitted.
– Secure bi-directional data transmission is always
available (register communication).
– Runtime compensation of the clock and data line is
possible. This makes it possible to use larger cable
lengths or higher data rates.
Fig. 6-2: Signal sequence for the BiSS C interface
Bit Bit meaning/sequence
number
1)
40 4 28 1 1
1) According to Type code breakdown
Tab. 6-2: BiSS-C resolution
Max. Clock
measuring frequency
length [m] f (MHz)
Clk
at 1 µm
resolution
6 48 0.1...10
english 17