Aventics AES Serie Systembeschreibung Seite 91

AVENTICS | AES I/O Modules, Analog | R412018147–BAL–001–AG
6.3.2.3 Process data of the inputs for "standardized 16 bits two's complement" data format
Table 22: Structure of the process data of the inputs for "standardized 16 bits two's complement" data format
(2AI2M12-E)
Bit Bit Bit Bit
15 14 13 12
D15 D14 D13 D12
D.. : Value of the bit (0/1)
Table 23: Value ranges of the process data of the inputs for "standardized 16 bits two's complement" data
format (2AI2M12-E)
Nominal value of the
Resolution
measurement range
to
0 10 V 1 mV/bit
to
0 20 mA 1 μA/bit
±10 V 1 mV/bit
±20 mA 1 μA/bit
to
2 10 V 1 mV/bit
to
4 20 mA 1 μA/bit
D.. : Value of the bit (0/1)
1)
In this operating mode, monitoring for a wire break is not possible (see "6.2 Diagnostic data" on page 86).
Bit Bit Bit Bit Bit
11 10 9 8 7
D11 D10 D9 D8 D7
Value
0 V
1 mV
10.0 V
10.2 V
> 10.2 V
0 mA
1 μA
20.0 mA
20.4 mA
> 20.4 mA
0 V
1 mV
10.0 V
10.2 V
> 10.2 V
-1 mV
-10.0 V
-10.2 V
< -10.2 V
0 mA
1 μA
20.0 mA
20.4 mA
>20.4 mA
-1 μA
-20.0 mA
-20.4 mA
< -20.4 mA
0 V
2 V
2.001 V
10.0 V
10.2 V
> 10.2 V
0 mA
4 mA
4.001 mA
20 mA
20.4 mA
> 20.4 mA
Structure of the I/O Module Data
Bit Bit Bit Bit Bit Bit
6 5 4 3 2 1
D6 D5 D4 D3 D2 D1
Example
D0–D15 D0–D15
Decimal Hexadecimal
0 0000
1 0001
10000 2710
10200 27D8
32767 7FFF
0 0000
1 0001
20000 4E20
20400 4FB0
32767 7FFF
0 0000
1 0001
10000 2710
10200 27D8
32767 7FFF
-1 FFFF
-10000 D8F0
-10200 D828
-32768 8000
0 0000
1 0001
20000 4E20
20400 4FB0
32767 7FFF
-1 FFFF
-20000 B1E0
-20400 A240
-32768 8000
1) 1)
2000 07D0
2000 07D0
2001 07D1
10000 2710
10200 27D8
32767 7FFF
1) 1)
4000 0FA0
4000 0FA0
4001 0FA1
20000 4E20
20400 4FB0
32767 7FFF
91
Bit
0
D0