Aventics AES Serie Systembeschreibung Seite 105

AVENTICS | AES I/O Modules, Analog | R412018147–BAL–001–AG
6.3.6.7 Process data of the outputs for "standardized 16 bits two's complement" data format
Table 51: Structure of the process data of the outputs for "standardized 16 bits two's complement" data
format (2AI2AO2M12-AE)
Bit Bit Bit Bit
15 14 13 12
D15 D14 D13 D12
D.. : Value of the bit (0/1)
Table 52: Value ranges of the process data of the outputs for "standardized 16 bits two's complement" data
format (2AI2AO2M12-AE)
Nominal value of the
Resolution
measurement range
0 to 10 V 1 mV/bit
0 to 20 mA 1 μA/bit
±10 V 1 mV/bit
4 to 20 mA 1 μA/bit
D.. : Value of the bit (0/1)
Bit Bit Bit Bit Bit
11 10 9 8 7
D11 D10 D9 D8 D7
Value
0 V
1 mV
10.0 V
10.2 V
10.5 V
0 mA
1 μA
20.0 mA
20.4 mA
21.0 mA
0 V
1 mV
10.0 V
10.2 V
10.5 V
-1 mV
-10.0 V
-10.2 V
-10.5 V
4 mA
4.001 mA
20 mA
20.4 mA
21.0 mA
Structure of the I/O Module Data
Bit Bit Bit Bit Bit Bit
6 5 4 3 2 1
D6 D5 D4 D3 D2 D1
Example
D0–D15 D0–D15
Decimal Hexadecimal
0 0000
1 0001
10000 2710
10200 27D8
≥ 10500 ≥ 2904
0 0000
1 0001
20000 4E20
20400 4FB0
≥ 21000 ≥ 5208
0 0
1 0001
10000 2710
10200 27D8
≥ 10500 ≥ 2904
-1 FFFF
-10000 D8F0
-10200 D828
≤ -10500 ≤ D6FC
0...4000 0000 to 0FA0
4001 0FA1
20000 4E20
20400 4FB0
≥ 21000 ≥ 5208
105
Bit
0
D0