Aventics AES Serie Systembeschreibung Seite 103

AVENTICS | AES I/O Modules, Analog | R412018147–BAL–001–AG
6.3.6.5 Process data of the outputs for "16 bits two's complement" data format
Table 47: Structure of the process data of the outputs for "16 bits two's complement" data format
(2AI2AO2M12-AE)
Bit Bit Bit Bit
15 14 13 12
D15 D14 D13 D12
D.. : Value of the bit (0/1)
Table 48: Value ranges of the process data of the outputs for "16 bits two's complement" data format
(2AI2AO2M12-AE)
Nominal value of the
Resolution
measurement range
0 to 10 V 333.33 μV/bit
0 to 20 mA 666.66 nA/bit
±10 V 333.33 μV/bit
4 to 20 mA 533.33 nA/bit
D.. : Value of the bit (0/1)
Bit Bit Bit Bit Bit
11 10 9 8 7
D11 D10 D9 D8 D7
Value
0 V
333.33 μV
10.0 V
10.2 V
10.5 V
0 mA
666.66 nA
20.0 mA
20.4 mA
21.0 mA
0 V
333.33 μV
10.0 V
10.2 V
10.5 V
-333.33 μV
-10.0 V
-10.2 V
-10.5 V
4 mA
4.000533 mA
20 mA
20.32 mA
21.0 mA
Structure of the I/O Module Data
Bit Bit Bit Bit Bit Bit
6 5 4 3 2 1
D6 D5 D4 D3 D2 D1
Example
D0–D15 D0–D15
Decimal Hexadecimal
0 0000
1 0001
30000 7530
30600 7788
≥ 31500 ≥ 7B0C
0 0000
1 0001
30000 7530
30600 7788
≥ 31500 ≥ 7B0C
0 0000
1 0001
30000 7530
30600 7788
≥ 31500 ≥ 7B0C
-1 FFFF
-30000 8AD0
-30600 8878
≤ 31500 ≤ 84F4
0 0000
1 0001
30000 7530
30600 7788
≥ 31875 ≥ 7C83
103
Bit
0
D0