Graf Elektronik FLO3 Handbuch Seite 56

REAO TRACK
Upon recelpt of the READ track command, the head is
loaded, and the Busy Status bit is set. Reading Starts with
the leadlng edge of the flrst encountered Index pulse and
contlnues unill the naxt Index pulse. All Qap, Header, and
data bytes are assembled and transferred to the data
register and ORQ's are generated for each byte. The ac-
cumulallon of bytes Is synchronized to each address mark
encountered. An Interrupt is generated at the completlon of
the command.
This command has several characteristics whlch make it
sultabie for diagnostic purposes. They are: the Read Gate
Is not actlvated during the command; no CRC checklng Is
performed; gap Information Is included In the data stream;
the Internat sida compare la not performed; and tha ad
dress mark detector is on for the duratlon of the command.
Because ihe A.M. detector Is always on, write spllces or
nolse may cause the Chip to lock for an A.M. If an address
mark does not appear on schedule tha Lost Data Status ftag
Isset
The ID A.M., ID field, ID CRC bytes, DAM, Data, and Data
CRC Bytes for each sector will be correct. The Gap Bytes
may be read incorrectty during write-spllce Urne because of
synchronizatlon.
TYPE III COMMAND WRITE TRACK TYPE III COMMAND WRITE TRACK
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