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Graf Elektronik FLO3 Handbuch Seite 46

Der fioppy-controller für den ndr-computer und den sb-computer
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PIN
NUMBER
22
23
25
25
26
27
28
29
30
31
32
33
34
PIN NAME
TEST
HEADLOADTIMING
REAOGATE
(1791.1792,1793,1794)
SIDE SELECT OUTPUT
(1795,1797)
READCLOCK
RAWREAD
HEADLOAD
TRACK GREATER THAN 43
WRITEGATE
WRITEDATA
REAOY
WRITE FAULT
VFO ENABLE
TRACK00
SYMBOL
TEST
HLT
RG
SSO
RCLK
RAWREAD
HLD
TG43
WG
WD
REAOY
WF/VFOE
TRÖÖ
FUNCTION
This input is used ior testlng purposes only and should be tied
to + 5V or lef t open by tha user unless interfacing to voice coll
actuated steppers.
When a logic high is tound on the HLT input the head is
assumed to be engagad. It Is typlcally derived from a 1 shot
triggered by HLD.
This Output is used for synchronization oi extemal data
Separators. The Output goes high after two Bytes ol zeros in
Single density, or 4 Bytes of either zeros or ones in double
density Operation.
The logic level of the Side Select Output is directiy controllod
by the 'S' flag in Type 11 or II) commands. When U = 1, SSO is
set to a logic 1. When U = 0, SSO is set to a logic 0. The SSO
is compared with the slde Information in the Sector I.D. Fleld.
If they do not compare Status Bit 4 (RNF) Is sei The Slde
Select Output Is only updated at the beginning of a Type II or
III command. It is forced to a logic 0 upon a MASTER RESET
condition.
A nominal square-wave dock Signal derived from the data
stream must be provtded to this InpuL Phaslng (i.e. RCLK
transitions) relative to RAW READ Is Important but polarlty
(RCLK high or Iow) is not.
The data input Signal directiy from the drive. This input shall
be a negative pulse for each recorded flux transition.
The HLD Output controls the loading of the Read-Write head
against the medla
This Output informs the drive that the Read/Write head is
positioned between tracks 44-76. This Output Is valld only
during Read and Write Commands.
This Output is made valid before writtng is to be performed on
Ihe diskette.
A 200 ns (MFM) or 500 ns (FM) Output pulse per flux transition.
WD contains the unique Address maiks as well as data and
dock in both FM and MFM formats.
This input Indicates dlsk readlness and is sampled for a logic
high before Read or Wrlte commands are performed. If Ready
is Iow the Read or Weite Operation Is not performed and an
Interrupt is generated. Type 1 operatlons are performed
regardless of the State of Ready. Ths Ready input appears In
inverted formal as Status Register blt 7.
This is a bl-directlonal Signal used to algnify writlng faults at
the drive, and to enabte the extemal PLO data Separator. When
WG = 1, Pin 33 functlons as a WF Input If WF = 0, any wrlte
command will Immedlately be terminated. When WG = 0, Pin
33 functlons as a VFOE Output VFOE will go Iow during a read
Operation after the head has toeded and settted (HLT = 1). On
the 1795/7, it will remain Iow until the last blt of the second
CRC byte in the ID field. VFOE will then go high until 8 bytes
(MFM) or 4 bytes (FM) before the Address Mark. It will then go
active until the last blt of the second CRC byte of the Data
Fleld. On the 1791/3, VFOE will remain Iow until the end of the
Data Fleld. This pin has an Interne! 100K Ohm pull-up resistor.
This input informs the FD179X that the Read/Write head Is
positioned over Track 00.
44

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