Graf Elektronik FLO3 Handbuch Seite 47

PIN NUMBER
35
36
37
PIN NAME
iNDgXPÜLSE
WRITE PROTECT
DOUBLE DENSITY
SYMBOL
IP
WPRT
DOEN
FUNCTION
This input informs the FD179X when the Index hole is en-
countered on the diskette.
This input is sampied whenever a Write Command is received.
A logic Iow terminates the command and sets the Wrile
Protect Status bit.
This input pin selscts either Single or double density
Operation. When DDEN = 0, double densily is selected. When
DDEN = 1, Single dansity is selected. This line musl be left
openon the 1792/4.
GENERAL DESCRIPTtON
The FD179X are N-Channel Silicon Gate MOS LSI
dsvices which perform the lunctions of a Floppy Disk
Formatter/Controller in a Single Chip Implementation.
The FD179X, which can be -considered the end result
of both the FD1771 and FD1781 deslgns, is IBM 3740
compatible in Single density mode (FM) and System 34
compatible in Double Density Mode (MFM). The
FD179X contains all the features of its predecessor the
FD1771, plus the added features necessary to
read/write and format a double density diskette. These
include address mark detection, FM and MFM encode
and decode logic, wlndow extension, and write precom-
pensation. In order to maintaln compatibiüty, the
FD1771, FD1781, and FD179X designs were made as
close as possible with the Computer interface, instruc-
tlon set, and I/O registers being identical. Also, head
load control is identical. In each case, the actual pin
asslgnments vary by only a few plns from any one to
another.
The processor Interface conslsts of an 8-bit bi-direc-
tlonal bus for data, Status, and control word transfers.
The FD179X Is set up to operate on a multiplexed bus
wlth other bus-oriented davices.
The FD179X is TTL compatible on all inputs and
Outputs. The Outputs will drive ONE TTL load or three
LS loads. The 1793 is Identical to the 1791 except the
DAL lines are TRUE for Systems that utilize true data
busses.
The 1795/7 has a side selsct output for Controlling
double sided drlvas, and the 1792 and 1794 are "Single
Density Onty" versions of the 1791 and 1793 respec-
tively. On these devices, DDEN must be left open.
ORQANIZATION
The Floppy Disk Formatter block diagram is illustrated
on page 5. The prlmary sections include the parallel
processor interface and the Floppy Disk interface.
Data Shllt Register — This 8-blt register assembles
serial data from the Read Data input (RAW READ)
during Read operations and transfers serial data to the
Write Data Output during Write operations.
Data Register — This 8-bit register is used as a
holding register during Disk Read and Write operations.
In Disk Read operations the assembled data byte is
transferred in parallel to the Data Register from the
Data Shlft Register. In Disk Write operations irv
formatlon is transferred in parallel from the Data
Register to the Data Shift Register.
When executing the Seek command the Data Register
holds the address of the desired Track Position. This
register is loaded from the DAL and gated onto the
DAL under processor control.
Track Register — This 8-bit register holds the track
number of the current Read/Write head Position. It is
incremented by one every Urne the head is stepped in
(towards track 76) and decremented by one when the
head is stepped out (towards track 00). The contenis of
the register are compared with the recorded track
number in the ID field during disk Read, Write, and
Verily operations. The Track Register can be loaded
from or transferred to the DAL This Register should
not be loaded when the devlce fs busy.
Sector RegistDr(SR) — This 8-bit register holds the address
of the desired sector position. The contents of ths register
are compared with the recorded sector number in the ID
field during disk Read or Write operations. The Sector
Register contents can be loaded from or transferred to the
DAL This register should not be loaded when the device is
busy.
Command Register <CR) — This 8-blt register holds the
command presently belng executed. This register should
not be loaded when the devlce is busy unless tha new
command is a force interrupt. The command register can
be loaded from the DAL, but not read onto the DAL
Status Register (STR) — This 8-blt register holds device
Status Information. The meaning of the Status bits is a
function of the type of command previously executed. This
register can be read onto the DAL but not loaded from the
DAL
CRC Logic — This logic is used to check or to generate the
16-bit Cyclic Redundancy Check (CRC). The polynomial is:
G(x) = x" + x" + x* + 1.
The CRC includes all Information starting with the address
mark and up to the CRC characters. The CRC register is
preset to ones prior to data being shifted through the
circuit.
Arlthmetlc/Loglc Unit (ALU) — The ALU is a serial com-
parator. incrementer, and decrementer and is used for
register modification and comparisons with the disk
recorded ID field.
Timlng and Control — All Computer and Floppy Disk In
terface controls are generated through this logic. The in-
ternal device timing is generated from an external crystal
dock.
The FD179X has two dillerent modes of Operation ac-
cording to the State of DDEN. When DDEN = 0 double
density (MFM) is assumed. Whan DDEN = 1, Single
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