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11.33 Post Code Display / Debug-Port 0X80,0X81; Figure 46: Debug Port 0X80/0X81 - Phytec phyCORE-Z500PT Hardware Bedienungsanleitung

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11.33 Post Code Display / Debug-Port 0x80,0x81

To simplify debugging of software, two 8-Bit display ports are available at the phyCORE-Z500P(T)
baseboard. They are write accessible via I/O-Address 0x80 and 0x81.
X33
X11
J6
R82
D7
R96
C43
C48
R86
U11
UMTS
0x80
D E B U G P O R T
0x81
D53
D54
D55
D56
U19
R131
D37
L8
C120
C59
C281
R170
B LU E TO O TH
R169
X17
TP1
TP2
C261
D2
U8
L9
X14
C122
TP3
C60
G P S
X16
Q23
Q24
Q22
Q29
5V / 3A
R289
Q26
Q28
Q27
R290
X37
Q30
D57
Q25
R296
Q19
S10
ATX
Q20
R287
O FF
U39
R278
R298
S8
S9
S6
S7
Figure 46:
Debug
© PHYTEC Messtechnik GmbH 2009
X6
P ci e S l ot 0
U37
L11
L10
TP5
TP6
X21
X29
R283
R284
C302
C365
C289
C318
X8
X5
M I N I P ci e
X15
JTA G
O N M A I N B O A R D
O N M O D U LE
R291
C240
D35
C253
X12
C249
C256
X36
D18
D15
D16
D17
R109
X1
RN4
J11
R211
R262
U6
U29
U4
L68
J12
C21
C5
R78
R77
Q9
U30
L67
Q10
C271
J5
C269
Q11
J9
C268
TP4
R329
R328
L75
L61
U17
C376
L63
U42
R338
L65
L76
C378
C78
C79
L59
C367
R129
C226
U33
R218
C227
R250
R32
R216
R126
R128
C224
R46
C221
R30
R265
R28
U34
R266
L73
L71
C64
R249
R248
C63
D50
D52
Q16
Q14
L72
C136
L69
C134
U31
ATX-Power
BAT1
L-732e_0
The phyCORE-Z500P(T) on the Carrirer Board
C266
C265
C267
X7
P ci e S l ot 1
U14
J7
R156
R152
C343
S5
R157
R163
C342
R153
R155
C344
C345
C350
R246
C359
C358
R164
R159
C346
C357
C356
C348
C298
C347
R160
R158
C297
C351
C296
JP1
X20
L12
L18
FP G A
C295
L14
C294
C291
X10
C284
C290
C322
C D I N
C320
R19
C301
C299
P H Y TE C P C M - 966
X19
C127
S O U N D
R187
R188
C29
C30
C128
C1
C2
M / S
X4
U3
X9
C46
R99
R83
R87
C340
C338
C35
C45
C335
C337
R98
C242
U2
C292
C234
C246
C247
R84
R81
C233
C244
C235
J2
J3
S C H
C P U
C336
C245
L4
R141
R139
R151
R147
R150
R146
U13
U5
C106
C104
C73
R140
C103
C72
R149
R144
C110
L7
R148
R145
C4
C3
D11
C70
R138
L5
C105
Q13
C69
Q7
C109
R3
R4
L6
R74
R57
R137
R136
R75
R56
R26
R274
C277
U32
C275
L74
U16
C230
OZ1
Super I/O
C279
C133
C65
C274
R245
J13
J14
C91
C137
L70
C90
C135
U18
R337
C278
R222
J8
C7
J1
X30
1- W I R E
Port
R191
C125
R178
C126
R177
R192
C160
C163
C177
C178
C174
C175
C179
C176
C147
C146
X28
Audio
R195
R197
C97
C117
X27
C47
Ethernet
R100
C44
R97
USB
C114
J4
Q12
C93
X26
Q6
U21
R125
D12
R220
B I O S
S E L.
BIOS
D13
C196
L57
C195
L56
X25
C194
L55
C193
L54
C192
L53
C191
L52
X22
C190
L51
C180
L41
C189
L50
C181
L42
C182
L43
C183
L44
C184
L45
C185
L46
C186
L47
X23
C187
L48
C188
L49
C139
C162
L28
C138
C157
L27
C173
C145
L34
C144
C156
L33
C142
C169
L31
C159
C143
L32
C158
C141
L30
C140
C168
L29
X24
C198
L38
R208
R207
L37
C199
C197
L66
R209
PS/2 Mouse
R210
L40
C200
L39
PS/2 Keyboard
0x80/0x81
91

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Diese Anleitung auch für:

Phycore-z500p

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