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phyCORE-Z500P(T)
6.7
PATA/IDE
The Intel® SCH provides an PATA-Interface which is able to drive an IDE Master-/Slave
configuration. It support PIO, ATA-5 (66 MB/s) and Ultra-DMA (33/66/100). A transfer rate up to
100 MB/s is supported.
At the phyCORE-Z500P(T) the PATA interface is used to connect a Solid State Disk and a SATA-II
bridge. Both can be Master or Slave. This is controlled by the CSEL signal which is routed to X2.
SDD/SATA activity can be monitored via the #DASP signal.
Signal-Name Description
CSEL
Select between SSD/SATA Master/Slave
#DASP
SSD/SATA activity signal
28
Nr. @ X2 on-board circuit
204
236
CSEL
SSD
SATA-II Bridge
0 (GND)
Slave
Master
1 (3.3V)
Master
Slave
© PHYTEC Messtechnik GmbH 2009
Type
PU 10k Ohm
I CMOS3.3
PU 475 Ohm, LED
O CMOS3.3
Remark
L-732e_0
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