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Phytec phyCORE-Z500PT Hardware Bedienungsanleitung

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phyCORE-Z500P(T)
ATOM
®
H
M
ARDWARE
ANUAL
E
J
2009
DITION
ULY
A product of a PHYTEC Technology Holding company

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Inhaltsverzeichnis
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Inhaltszusammenfassung für Phytec phyCORE-Z500PT

  • Seite 1 ATOM ® ARDWARE ANUAL 2009 DITION A product of a PHYTEC Technology Holding company...
  • Seite 2 PHYTEC Messtechnik GmbH neither gives any guarantee nor accepts any liability whatsoever for consequential damages resulting from the use of this manual or its associated product. PHYTEC Messtechnik GmbH reserves the right to alter the information contained herein without prior notification and accepts no responsibility for any damages which might result.

  • Seite 3: Inhaltsverzeichnis

    LPC to SPI Bridge / Power-Management (U21)........34 7.1 BIOS SPI-Flash (U17) ..............34 Real Time Clock / CMOS Battery ............35 Technical Specifications ..............37 Hints for Handling the phyCORE-Z500PT ..........39 The phyCORE Z500P(T) on the Carrier Board ........41 11.1 Connectors ..................41 11.2 Jumpers on the Baseboard PCM-966 ..........45 11.3 Functional Components on the phyCORE-Z500P(T)
  • Seite 4 PCIe mini Card Connector X8 ..........89 11.33 Post Code Display / Debug-Port 0x80,0x81 .......91 11.34 Push Buttons and LEDs............92 11.35 Address-Map / USB-Tree ...........94 11.36 Baseboard Physical Dimension ..........95 Revision History ...................97 Component Placement Diagram ............99 Index ......................101 © PHYTEC Messtechnik GmbH 2009 L-732e_0...
  • Seite 5 Contents Index of Figures Figure 1: Block Diagram phyCORE-Z500PT ........4 Figure 2: Top View of the phyCORE-Z500PT (controller side)..5 Figure 3: Bottom View of the phyCORE-Z500PT (connector side) ..............6 Figure 4: Numbering of the Jumper Pads........15 Figure 5: Location of the Jumpers (Top View).......16 Figure 6: Location of the Jumpers (Bottom View)......17...
  • Seite 6 Figure 45: PCI Express Mini Card connector X8 ......90 Figure 46: Debug Port 0x80/0x81............91 Figure 47: Push Buttons and LEDs ..........93 Figure 48: Baseboard physical dimensions ........95 Figure 49: phyCORE-Z500P(T) Component Placement, Top View.................99 Figure 50: phyCORE-Z500P(T) Component Placement, Bottom View..............100 © PHYTEC Messtechnik GmbH 2009 L-732e_0...
  • Seite 7 Table 24: Audio Signal Pin header X19..........70 Table 25: CD-Audio connector X20..........71 Table 26: SATA connector X9 ............72 Table 27: Universal LVDS Display pin header X29 ......73 Table 28: Secure Digital / Multi-Media-Card X31 ......74 © PHYTEC Messtechnik GmbH 2009 L-732e_0...
  • Seite 8 Table 42: miniPCIe slot X8 .............89 Table 43: LEDs at the baseboard...........92 Table 44: Switches at the baseboard ..........92 Table 45: I/O-Address Map.............94 Table 46: I²C-Address Map (8-bit) ..........94 Table 47: USB Port usage ..............94 © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 9: Preface

    Magnetic Directives. Users should ensure conformance following any modifications to the products as well as implementation of the products into target systems. The phyCORE-Z500PT is one of a series of PHYTEC Single Board Computers that can be populated with different controllers and, hence, offers various functions and configurations. PHYTEC supports a variety of...

  • Seite 10: Introduction

    Microvias are used on the boards, providing phyCORE users with access to this cutting edge miniaturization technology for integration into their own design. The phyCORE-Z500PT is a subminiature (85 x 100 mm) insert-ready Single Board Computer populated with the Intel® Atom Z510P/PT, Z520PT or Z530P CPU.
  • Seite 11 Introduction The phyCORE-Z500PT offers the following features: • Subminiature Single Board Computer (85 x 100 mm) achieved through modern SMD technology • Improved interference safety achieved through multi-layer PCB technology and dedicated ground pins • Controller signals and ports extend to one 2 x 120-pin high-density (0.5 mm) Samtec connector aligned one side of the board, enabling it to be plugged like a "big chip"...

  • Seite 12: Block Diagram

    Block Diagram Figure 1: Block Diagram phyCORE-Z500PT © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 13: View Of The Phycore-Z500Pt

    Introduction View of the phyCORE-Z500PT Figure 2: Top View of the phyCORE-Z500PT (controller side) © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 14: Figure 3: Bottom View Of The Phycore-Z500Pt

    Figure 3: Bottom View of the phyCORE-Z500PT (connector side) © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 15: Pin Description (X2)

    Please refer to the Intel® Z500PT User’s Manual/Data Sheet for details on the functions and features of controller signals and port pins. © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 16: Table 1: Pinout Of The Phycore-Connector X2

    LPC_SERIRQ LPC interrupt line Ground Power GPIO_SUS0 #PM_PWRBTTN Debounced copy of #SMC_ONOFF output GPIO_0 GPIO_2 Ground Power GPIO_4 GPIO_6 GPIO_8 #H_IERR Ground Power MMC_0_LED Activity output MMC0 output #MMC0_CD Card detect MMC0 Input (PU) © PHYTEC Messtechnik GmbH 2009 L-732e_0...
  • Seite 17 Diff bidir USB_DN_3 USB Port 3 neg. Dataline Diff bidir Ground Power USB_DP_2 USB Port 2 pos. Dataline Diff bidir USB_DN_2 USB Port 2 neg. Dataline Diff bidir #USB_OC_2 Over current USB port 2 input © PHYTEC Messtechnik GmbH 2009 L-732e_0...
  • Seite 18 PCIe neg. clock for Slot 0 Diff output #PCIE_WAKE Wake Signal input Ground Power PCIE_TXP_1_CON First PCIe Transmit pos. Diff output #PCIE_TXN_1_CON First PCIe Transmit neg. Diff output #CLK_SLOT0_OE Output enable for Slot 0 clock Input (PU) © PHYTEC Messtechnik GmbH 2009 L-732e_0...
  • Seite 19 LVDS Backlight select / GPIO SCH_GPIOSUS_3 GPIO_1 GPIO_3 Ground Power GPIO_5 #SLPIOVR #L_BKLTSEL LVDS Backlight select output #H_IGNNE Ground Power MMC_2_LED Activity output MMC2 output #MMC2_CD Card detect MCM2 Input (PU) MMC2_WP Write protect MMC2 input © PHYTEC Messtechnik GmbH 2009 L-732e_0...
  • Seite 20 Diff bidir #USB_OC_4 Over current USB port 4 input USB_DP_4 USB Port 4 pos. Dataline Diff bidir USB_DN_4 USB Port 4 neg. Dataline Diff bidir Ground Power USB_DP_1 USB Port 1 pos. Dataline Diff bidir © PHYTEC Messtechnik GmbH 2009 L-732e_0...
  • Seite 21 Ethernet Speed Led Output (OD) PCIE_TXP_2 Second PCIe Transmit pos. Diff output PCIE_TXN_2 Second PCIe Transmit neg. Diff output Ground Power PCIE_RXP_2 Second PCIe receive pos. Diff input #PCIE_RXP_2 Second PCIe receive neg. Diff input © PHYTEC Messtechnik GmbH 2009 L-732e_0...
  • Seite 22 Power #SATA_RX SATA receive neg. signal Diff input SATA_RX SATA receive pos. Signal Diff input #DASP SSD/SATA activity signal output SATA_TX SATA transmit pos. signal Diff output #SATA_TX SATA transmit neg. signal Diff output © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 23: Jumpers

    Jumpers 3 Jumpers For configuration purposes, the phyCORE-Z500PT has 4 solder jumpers, some of which have been installed prior to delivery. Figure 4 illustrates the numbering of the solder jumper pads, while Figure 5 and Figure 6 indicate the location of the solder jumpers on the board. Three solder jumpers are located on the top side of the module (opposite side of connectors).

  • Seite 24: Figure 5: Location Of The Jumpers (Top View)

    Figure 5: Location of the Jumpers (Top View) © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 25: Figure 6: Location Of The Jumpers (Bottom View)

    Jumpers Figure 6: Location of the Jumpers (Bottom View) © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 26: Table 2: Jumper Settings

    Solid-State-Disk is write write protected. protected. 1 + 2 A SPI-Flash is used as 1 + 3 A SPI-EEPROM is used as configuration-/ROM-device for configuration-/ROM-device for 6.11.2 the Ethernet controller. the Ethernet controller. © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 27: Power Requirements

    Power Requirements Power Requirements The phyCORE-Z500PT normally operates off a single voltage supply denoted as VCC5VA. Table 3: Power supply power supply min. typ. max. 5 V (VCC5VA) 4.5 V 5.5 V The input voltage range of VCC5VA is from 4.5 V.. 5.5 V allowing a current draw of typically 700 mA.

  • Seite 28: Cpu Intel® Z5Xx (U1)

    Z510PT CH80566EE005DT -40 – 85°C 400MHz populated populated Z520PT CH80566EE014DT -40 – 85°C 533MHz populated populated Z530P CH80566EE025DW 0 – 70°C 533MHz populated populated For more information take a look at http://www.Intel® .com/design/intarch/atom500/index.htm © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 29: Sch Us15Wp(T) (U2)

    LPC_AD1 LPC Bus Address 1 IPU 50k Ohm I/O CMOS3.3 LPC_AD2 LPC Bus Address 2 IPU 50k Ohm I/O CMOS3.3 LPC_AD3 LPC Bus Address 3 IPU 50k Ohm I/O CMOS3.3 Table 4: LPC-Bus signals © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 30: Lvds Interface

    ±0.508 mm (±20 mils). The maximum recommended trace length from the SCH to the LVDS connector including package length. Also the LVDS cable should have an impedance of 97 Ohm ± 20 % and a maximum length of 177,8 mm (7 inches). © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 31: Sdio/Mmc Interface

    O CMOS3.3 SR 47 Ohm MMC2_CLK Clock MMC2 O CMOS3.3 55mm SR 47 Ohm PU 10k Ohm MMC2_CMD Command MMC2 SR 47 Ohm CMOS3.3 IPU 75k Ohm MMC2_DATA0 MMC2 dataline 0 SR 47 Ohm CMOS3.3 © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 32: Sdvo

    SDVOB green neg. IPU 50 Ohm O LVDS #SDVOB_GREEN SC 100nF signal SDVOB blue pos. IPU 50 Ohm O LVDS SDVOB_BLUE signal SC 100nF SDVOB blue neg. IPU 50 Ohm #SDVOB_BLUE O LVDS SC 100nF signal © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 33: Pcie

    ISR 33Ohm PCIE_TXP_2 Second PCIe Transmit pos. SC 100nF O PCIe PCIE_TXN_2 Second PCIe Transmit neg. SC 100nF O PCIe PCIE_RXP_2 Second PCIe receive pos. I PCIe #PCIE_RXP_2 Second PCIe receive neg. I PCIe © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 34: Ethernet Controller Intel® 82574I (U16)

    Activity Led O CMOS3.3 ±12 mA LAN_LED1 Link Led O CMOS3.3 ±12 mA LAN_LED2 Speed Led O CMOS3.3 ±12 mA Caution! Please note the design specifications provided by Intel® when creating the Ethernet transformer circuitry. © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 35: Usb

    IPD 15k Ohm I/O USB USB_DP_1 USB Port 1 pos. Dataline IPD 15k Ohm I/O USB USB_DN_1 USB Port 1 neg. Dataline IPD 15k Ohm #USB_OC_1 Over current USB port 1 PU 10k Ohm I CMOS3.3 © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 36: Pata/Ide

    Nr. @ X2 on-board circuit Type Remark CSEL Select between SSD/SATA Master/Slave PU 10k Ohm I CMOS3.3 #DASP SSD/SATA activity signal PU 475 Ohm, LED O CMOS3.3 CSEL SATA-II Bridge 0 (GND) Slave Master 1 (3.3V) Master Slave © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 37: Solid State Disk Ssd (U4,U5,U6,U7)

    PF29F32G32PANC1 PF29F32G32PANC1 Caution! This feature is subject to change. Intel® has discontinued these parts. Phytec will provide a solution or updated version of the current PCB. It is intended that this new solution will not impact any current designs. Please contact our support-/sales-team for further information.

  • Seite 38: Intel® High Definition Audio (Intel® Hd Audio)

    Intel® HD Audio Clock SR 33Ohm IPD 22k Ohm Intel® HD Audio Serial O CMOS HDA HDA_SDO SR 33Ohm Data Out IPD 22k Ohm O CMOS HDA HDA_SYNC Intel® HD Audio Sync SR 33Ohm IPD 22k Ohm © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 39: Gpios

    PD 10k Ohm GPIO_2 PU 10k Ohm GPIO_3 PU 10k Ohm IPU 22k Ohm GPIO_4 GPIO_5 GPIO_6 PU 10k Ohm Used for #SLPIOVR (GPIO_7) System Managment Used for GPIO_8 PU 10k Ohm System Managment #L_BKLTSEL (GPIO_9) © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 40: Jtag

    PCIe Slot 0/1, PCIe core, CPU-BCLK, SCH-BCLK, Display-PLL A/B. Both PCIe clocks can be separately enabled by driving CLK_SLOT1_OEn / CLK_SLOT2_OEn to GND. The Clock-Generator is connected to the SMB bus and can be accessed with I²C address 0xD2. © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 41: I²C Eeprom (U3)

    The Intel® SCH support up to 2 GByte DDR2 memory on two ranks. Rank 1 include U9,10,11,12 at the top and Rank 2 include U8,U13,U14,U15 at the bottom side of the phyCORE-Z500P(T). See the manufacturer’s data sheet for interfacing and operation. © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 42: Lpc To Spi Bridge / Power-Management (U21)

    This is useful to use a LPC-Flash as BIOS storage device. on-board Signal-Name Description Nr. @ X2 Type Remark circuit FWH_BSEL BIOS bank select input I CMOS3.3 FWH_EN disable on board FWH PU 10k Ohm I CMOS3.3 © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 43: Real Time Clock / Cmos Battery

    NITS VBAT 2.0 V 3.3 V 3.6 V If you choose not to use a battery with the phyCORE-Z500P(T) then VBAT should be not connected. See section 9 Technical Specifications for battery power consumption. © PHYTEC Messtechnik GmbH 2009 L-732e_0...
  • Seite 44 © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 45: Technical Specifications

    (connector) side of the PCB and approximately 5.0 mm on the top (CPU/SCH) side. The board itself is approximately 1.4 mm thick. 85,00 mm 81,00 mm 9,00 mm 6,21 mm 12,75 mm 4,00 mm 11,92 mm Figure 7: Physical Dimensions © PHYTEC Messtechnik GmbH 2009 L-732e_0...
  • Seite 46 512 MByte DDR2-SDRAM, 2 GByte SSD, Ethernet, SATA, 1.1 GHz CPU frequency at 20°C Typ. 700 mA@5 V, max. 5 W These specifications describe the standard configuration of the phyCORE-Z500P(T) as of the printing of this manual. © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 47: 10 Hints For Handling The Phycore-Z500Pt

    Hints for Handling 10 Hints for Handling the phyCORE-Z500PT Removal of various components, such as solder jumper and configuration resistors, is not advisable given the compact nature of the module. Should this nonetheless be necessary, please ensure that the board as well as surrounding components remain undamaged while desoldering. Overheating the board can cause the solder pads to loosen, rendering the module inoperable.
  • Seite 48 © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 49: The Phycore Z500P(T) On The Carrier Board

    PHYTEC Single Board Computer (SBC) modules. Carrier Boards are designed for evaluation, testing and prototyping of PHYTEC Single Board Computers in laboratory environments prior to their use in customer designed applications.
  • Seite 50 Manual/Data Sheets. As damage from improper connections varies according to use and application, it is the user‘s responsibility to take appropriate safety measures to ensure that the module connections are protected from overloading through connected peripherals. © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 51: Figure 8: Carrier Board Connector Location Top Side

    C136 C198 R208 C134 R287 R207 O FF C199 R278 ATX-Power C197 R298 R209 PS/2 Mouse R210 C200 BAT1 PS/2 Keyboard 1- W I R E Figure 8: Carrier Board connector location top side © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 52: Figure 9: Carrier Board Connector Location Bottom Side

    C371 R332 C148 C171 C167 C165 R330 C161 C154 C152 C150 R339 R331 MMC1 R302 R314 R312 R319 R318 R320 R321 R316 R311 R317 R313 R315 Figure 9: Carrier Board connector location bottom side © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 53: Jumpers On The Baseboard Pcm-966

    Figure 10 illustrates the numbering scheme for various jumper blocks. Note that in each case pin 1 is always marked with a clipped corner on the PCB silk screen. Figure 11 highlights the locations of all user configurable jumpers on the phyCORE-Z500P(T) Carrier Board. © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 54: Figure 11: Carrier Board Jumper Location

    C168 C140 C136 C198 R208 C134 R287 R207 O FF C199 R278 ATX-Power C197 R298 R209 PS/2 Mouse R210 C200 BAT1 PS/2 Keyboard 1- W I R E Figure 11: Carrier Board jumper location © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 55: Table 8: Carrier Board Jumper Descriptions

    On-Board Power is switched by Power Management Closed On Board Power is forced on Open SDD is Master / SATA is Slave closed SATA is Master / SDD is Slave Default settings are in bold blue text © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 56: Functional Components On The Phycore-Z500P(T) Carrier Board

    C198 R208 C134 R287 R207 O FF C199 R278 C197 ATX-Power R298 R209 PS/2 Mouse R210 C200 BAT1 PS/2 Keyboard 1- W I R E Figure 12: Top view of the phyCORE-Z500P(T) Carrier Board © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 57: Module Connector (X1)

    The phyCORE-Z500P(T) must be placed correctly onto the Carrier Board at X1. Be careful when pushing down the module. It is possible to bolt the module at the baseboard with 8 mm bolts. 11.3.2 Power Supply (X37) / ATX-Power ATX-Power Figure 13: Power Supply (X37) © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 58: Figure 14: Power Adapter

    A battery (BAT1) is used as backup supply for CMOS and other nonvolatile components on the module. Fore ease to see which voltage is powered on/off, there are LED’s above the ATX-Power connector. © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 59: Usb

    500mA. This is supervised by an TPS2042A device (U3). If an over current situation occurs, the power is switched of and signaled to the SCH Figure 15: USB-Host connector Port-0/1 Signal VUSB USB D+ USB D- Table 10: Pinning of X27 © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 60: Usb-Host/Client (X26)

    The Intel SCH supports the USB-Client or USB-Host feature on Port 2. The connector type of X26 is USB Mini AB. Figure 16: USB-OTG (X26) Signal VBUS USB D- USB D+ Table 11: Pinning of X26 © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 61: Usb-Pin Header X5

    "Front Panel I/O Connectivity Design Guide" (v1.2). Both ports are able to supply up to 500mA to the connected USB-Device. Remark: USB-Port 6 is only capable for High-Speed connections Figure 17: USB-Pin Header X5 Signal VCC_USB3 VCC_USB6 USB_DN_3_CON USB_DN_6_CON USB_DP_3_CON USB_DP_6_CON n.c. (key) n.c. Table 12: Pinning of USB-Pin Header X5 © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 62: Umts (U11)

    Output of EPLD (U35) UMTS_PWRMON Power Monitor Output Input of EPLD (U35) Led D36 signals the status of the UMTS module/connection. For further information see the Users- Manual/Datasheet of the mounted module at www.telit.com. © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 63: Figure 18: Umts (U11)

    C141 C158 C168 C140 C136 C198 R208 C134 R287 R207 O FF C199 R278 ATX-Power C197 R298 R209 PS/2 Mouse R210 C200 BAT1 PS/2 Keyboard 1- W I R E Figure 18: UMTS (U11) © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 64: Gps (U8)

    C141 C158 C168 C140 C136 C198 R208 C134 R287 R207 O FF C199 R278 ATX-Power C197 R298 R209 PS/2 Mouse R210 C200 BAT1 PS/2 Keyboard 1- W I R E Figure 19: GPS (U8) © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 65: Rs-232 Pin Header (X14)

    C168 C140 C136 C198 R208 C134 R287 O FF R207 C199 R278 ATX-Power C197 R298 R209 PS/2 Mouse R210 C200 BAT1 PS/2 Keyboard 1- W I R E Figure 20: RS232 Pin Header X14 © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 66: One-Wire Interface (X30)

    Many One-Wire devices operate within a voltage range of 2.8 V to 5.5 V. But there are also some devices which only operate from 3 V to 3.7 V. Please refer to the datasheet of the One-Wire device which should be used to avoid destruction. © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 67: Bluetooth Interface (U19)

    The Baud rate after power-up can be selected with R169/R170 according the following table: Baudrate R169 (OP4) R170 (OP5) Read from int. EERPOM populated populated 9600 bps populated 115200 bps populated 921600 bps populated populated Table 15: Bluetooth baudrate © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 68: 11.10 Touch Connector X21

    An ADS7845 touch controller (U15) is connected to serial port 1 of the FTDI U14 which is connected at high-speed to USB port 7 of the phyCORE-Z500P(T). This port is used in SPI mode. The touch signals are available at X21 and X29. Signal WIPER Table 16: Touch signals at X21/X29 © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 69: Figure 23: Touch Connector X21

    C158 C168 C140 C136 C198 R208 C134 R287 R207 O FF C199 R278 ATX-Power C197 R298 R209 PS/2 Mouse R210 C200 PS/2 Keyboard BAT1 1- W I R E Figure 23: Touch connector X21 © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 70: Rs-232 Interface (X23)

    This serial interface can be accessed through Uart1 at IO-address 0x3f8 IRQ4. Signal Direction DCD1_RS232_CON Input DSR1_RS232_CON Input RXD1_RS232_CON Input RTS1_RS232_CON Output TXD1_RS232_CON Output CTS1_RS232_CON Input DTR1_RS232_CON Output RI1_RS232_CON Input Power n.c. (key) Table 17: RS-232 Interface X23 Figure 24: RS232 Interface X23 © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 71: Lpt Printer Interface (X22)

    Input BUSY_CON Input PE_CON Input SLCT_CON Input #ALF_CON Output #ERROR_CON Input #INIT_CON Output #SLCTIN_CON Output Power Power Power Power Power Power Power Power Table 18: LPT interface (X22) Figure 25: LPT Printer Interface X22 © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 72: Ps/2 Mouse/Keyboard Interface (X24)

    This Keyboard uses IRQ1 and Mouse IRQ12. Signal Direction PS/2_KEYB_DAT_CON N.C. Power VCC5VA Power PS/2_KEYB_CLK_CON N.C. PS/2_MOUSE_DAT_CON N.C: Power VCC5VA Power PS/2_MOUSE_CLK_CON N.C: Table 19: PS/2 Mouse and Keyboard interface (X24) Figure 26: PS/2 Mouse and Keyboard interface (X24) © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 73: Dvi-I Video Interface (X25)

    DVI_D0_N Diff out DVI_D0_P Diff out Power N.C. N.C. Power DVI_CLK_P Diff out DVI_CLK_N Diff out N.C. N.C. N.C. N.C. N.C. Table 20 below shows the signal mapping of the signals to connector X25. © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 74: Figure 27: Dvi-I Connector X25

    Power HPDET Input DVI_D0_N Diff out DVI_D0_P Diff out Power N.C. N.C. Power DVI_CLK_P Diff out DVI_CLK_N Diff out N.C. N.C. N.C. N.C. N.C. Table 20: DVI-I connector X25 Figure 27: DVI-I connector X25 © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 75: Ethernet Interface (X27)

    Table 21 below shows the signal mapping of the signals to connector X27. LED1 (green) acts as the link status LED and LED2 as traffic. Signal MDI_CS0P MDI_CS0N MDI_CS1P MDI_CS1N MDI_CS2P MDI_CS2N MDI_CS3P MDI_CS3N Table 21: Ethernet interface X27 Figure 28: Ethernet Interface X27 © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 76: Audio Connector (X28)

    Devices. Table 22 below shows the signal mapping of the signals to connector X28. Color Signal Black Center Out Blue Line In Orange Surround Out Green Line Out Pink Micro Square black/grey Optical Interface Table 22: Audio connector X28 Figure 29: Audio connector X28 © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 77: Front-Panel Pin Header (X15)

    C140 C136 C198 R208 C134 R287 R207 O FF C199 R278 ATX-Power C197 R298 R209 PS/2 Mouse R210 C200 BAT1 PS/2 Keyboard 1- W I R E Figure 30: Front Panel Pin Header X15 © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 78: Audio-Signal Pin Header (X19)

    C140 C136 C198 R208 C134 R287 R207 O FF C199 R278 ATX-Power C197 R298 R209 PS/2 Mouse R210 C200 BAT1 PS/2 Keyboard 1- W I R E Figure 31: Audio Signal Pin Header X19 © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 79: Cd-Audio-Connector (X20)

    C141 C168 C140 C136 C198 R208 C134 R287 R207 O FF C199 R278 C197 ATX-Power R298 R209 PS/2 Mouse R210 C200 BAT1 PS/2 Keyboard 1- W I R E Figure 32: CD-Audio connector X20 © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 80: Sata-Connector (X9)

    C158 C168 C140 C136 C198 R208 C134 R287 O FF R207 C199 R278 C197 ATX-Power R298 R209 PS/2 Mouse R210 C200 BAT1 PS/2 Keyboard 1- W I R E Figure 33: SATA connector X9 © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 81: Universal Lvds Display Pinheader (X29)

    C136 C198 R208 C134 R287 R207 O FF C199 R278 C197 ATX-Power R298 R209 PS/2 Mouse R210 C200 BAT1 PS/2 Keyboard 1- W I R E Figure 34: Universal LVDS Display pin header X29 © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 82: Secure Digital / Multi-Media Card (X31/X32)

    Dataline 3 MMC2_CMD Command PU10k Ground VCC3V3S Power MMC2_CLK Clock PU10k Power MMC2_DATA0 Dataline 0 MMC2_DATA1 Dataline 1 MMC2_DATA2 Dataline 2 #MMC2_CD Card detect Ground MMC2_WP Write-Protect PU10k Table 29: Secure Digital / Multi-Media-Card X32 © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 83: Figure 35: Secure Digital / Multi Media Card Connector X30/X31

    C148 C171 C167 C165 R330 C161 C154 C152 C150 R339 R331 MMC1 R302 R314 R312 R319 R318 R320 R321 R317 R316 R313 R315 R311 Figure 35: Secure Digital / Multi Media Card connector X30/X31 © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 84: Fpga Jtag-Pin Header (X10)

    C141 C168 C140 C136 C198 R208 C134 R287 R207 O FF C199 R278 ATX-Power C197 R298 R209 PS/2 Mouse R210 C200 BAT1 PS/2 Keyboard 1- W I R E Figure 36: FPGA JTAG header © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 85: Hsma Jtag-Pin Header (X11)

    C140 C136 C198 R208 C134 R287 R207 O FF C199 R278 ATX-Power C197 R298 R209 PS/2 Mouse R210 C200 BAT1 PS/2 Keyboard 1- W I R E Figure 37: HSMA JTAG pin header X11 © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 86: Baseboard Pld Jtag-Pin Header (X12)

    C158 C141 C168 C140 C136 C198 R208 C134 R287 O FF R207 C199 R278 C197 ATX-Power R298 R209 PS/2 Mouse R210 C200 BAT1 PS/2 Keyboard 1- W I R E Figure 38: JTAG header © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 87: Pcie-Switch Jtag-Port (X4)

    C168 C140 C136 C198 R208 C134 R287 R207 O FF C199 R278 C197 ATX-Power R298 R209 PS/2 Mouse R210 C200 BAT1 PS/2 Keyboard 1- W I R E Figure 39: PCIe Switch JTAG-Port (X4) © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 88: Z500P(T) Jtag/Xdp-Port (X34)

    C158 C140 C168 C136 C198 R208 C134 R287 R207 O FF C199 R278 C197 ATX-Power R298 R209 PS/2 Mouse R210 C200 BAT1 PS/2 Keyboard 1- W I R E Figure 40: Z500P(T) JTAG/XDP-Port (X34) © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 89: Us15Wp(T) Jtag-Port (X35)

    C141 C168 C140 C136 C198 R208 C134 R287 R207 O FF C199 R278 ATX-Power C197 R298 R209 PS/2 Mouse R210 C200 BAT1 PS/2 Keyboard 1- W I R E Figure 41: US15WP(T) JTAG-Port (X35) © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 90: Phycore Pld Jtag-Pin Header (X36)

    C136 C198 R208 C134 R287 O FF R207 C199 R278 C197 ATX-Power R298 R209 PS/2 Mouse R210 C200 BAT1 PS/2 Keyboard 1- W I R E Figure 42: phyCORE PLD JTAG pin header X36 © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 91: Hsmc Connector (X33)

    N.C. N.C. N.C. N.C. N.C. N.C. N.C. HSMA_TX_CP2 HSMA_RX_P2 HSMA_TX_CN2 HSMA_RX_N2 HSMA_TX_CP1 HSMA_RX_P1 HSMA_TX_CN1 HSMA_RX_N1 HSMA_TX_CP0 HSMA_RX_P0 HSMA_TX_CN0 HSMA_RX_N0 HSMA_SDA HSMA_SCL HSMA_JTAG_TCK HSMA_JTAG_TMS HSMA_JTAG_TDO HSMA_JTAG_TDI HSMA_CLK_OUT0 HSMA_CLKIN0 Table 37: HSMC connector X33 Bank 1 © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 92: Table 38: Hsmc Connector X33 Bank 2

    HSMA_RX_D_P2 HSMA_TX_D_N2 HSMA_RX_D_N2 HSMA_TX_D_P3 HSMA_RX_D_P3 HSMA_TX_D_N3 HSMA_RX_D_N3 HSMA_TX_D_P4 HSMA_RX_D_P4 HSMA_TX_D_N4 HSMA_RX_D_N4 HSMA_TX_D_P5 HSMA_RX_D_P5 HSMA_TX_D_N5 HSMA_RX_D_N5 HSMA_TX_D_P6 HSMA_RX_D_P6 HSMA_TX_D_N6 HSMA_RX_D_N6 HSMA_TX_D_P7 HSMA_RX_D_P7 HSMA_TX_D_N7 HSMA_RX_D_N7 HSMA_CLK_OUT_P1 HSMA_CLK_IN_P1 HSMA_CLK_OUT_N1 HSMA_CLK_IN_N1 Table 38: HSMC connector X33 Bank 2 © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 93: Table 39: Hsmc Connector X33 Bank 3

    HSMA_RX_D_N11 HSMA_TX_D_P12 HSMA_RX_D_P12 HSMA_TX_D_N12 HSMA_RX_D_N12 HSMA_TX_D_P13 HSMA_RX_D_P13 HSMA_TX_D_N13 HSMA_RX_D_N13 HSMA_TX_D_P14 HSMA_RX_D_P14 HSMA_TX_D_N14 HSMA_RX_D_N14 HSMA_TX_D_P15 HSMA_RX_D_P15 HSMA_TX_D_N15 HSMA_RX_D_N15 HSMA_TX_D_P16 HSMA_RX_D_P16 HSMA_TX_D_N16 HSMA_RX_D_N16 HSMA_CLK_OUT_P2 HSMA_CLK_IN_P2 HSMA_CLK_OUT_N2 HSMA_CLK_IN_N2 VCC3V3S HSMA_PSINT Table 39: HSMC connector X33 Bank 3 © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 94: Figure 43: Hsmc Connector X33

    C158 C140 C168 C136 C198 R208 C134 R287 R207 O FF C199 R278 C197 ATX-Power R298 R209 PS/2 Mouse R210 C200 BAT1 PS/2 Keyboard 1- W I R E Figure 43: HSMC connector X33 © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 95: 11.31 Pcie At The Phycore-Z500P(T) Baseboard

    ATX_12VDC PCIE_SLOT5_PRESENT ATX_12VDC ATX_12VDC N.C. ATX_12VDC SMB_CLK N.C. SMB_DATA N.C. N.C. VCC3V3S N.C. N.C. VCC3V3S VCC3V3A VCC3V3S #PCIE_WAKE #RESET N.C. CLK_PCIE_SLOT5 PCIE_TXN_5 #CLK_PCIE_SLOT5 PCIE_TXP_5 PCIE_RXP_5 #CLK_PCIESLOT1_OE PCIE_RXN_5 Table 41: PCIe x 1 slot X7 © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 96: Figure 44: Pcie Slot X6/X7

    C141 C168 C140 C136 C198 R208 C134 R287 O FF R207 C199 R278 C197 ATX-Power R298 R209 PS/2 Mouse R210 C200 BAT1 PS/2 Keyboard 1- W I R E Figure 44: PCIe Slot X6/X7 © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 97: 11.32 Pcie Mini Card Connector X8

    N.C. N.C. #RESET PCIE_RXN_6 VCC3V3A PCIE_RXP_6 VCC1V5S SMB_CLK PCIE_TXN_6 SMB_DATA PCIE_TXP_6 USB_DN_3_CON N.C. USB_DP_3_CON N.C. N.C. Led D15 N.C. Led D16 N.C. Led D17 N.C. VCC1V5S N.C. N.C. VCC3V3S Table 42: miniPCIe slot X8 © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 98: Figure 45: Pci Express Mini Card Connector X8

    C136 C198 R208 C134 R287 O FF R207 C199 R278 ATX-Power C197 R298 R209 PS/2 Mouse R210 C200 BAT1 PS/2 Keyboard 1- W I R E Figure 45: PCI Express Mini Card connector X8 © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 99: 11.33 Post Code Display / Debug-Port 0X80,0X81

    C141 C140 C168 C136 C198 R208 C134 R287 O FF R207 C199 R278 C197 ATX-Power R298 R209 PS/2 Mouse R210 C200 BAT1 PS/2 Keyboard 1- W I R E Figure 46: Debug Port 0x80/0x81 © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 100: 11.34 Push Buttons And Leds

    Signal Description USER_PB0 General User Button connected to the FPGA USER_PB1 General User Button connected to the FPGA #PM_SYSRST System reset #PWR_BTN Power Power Off Hard power off Table 44: Switches at the baseboard © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 101: Figure 47: Push Buttons And Leds

    The phyCORE-Z500P(T) on the Carrirer Board Figure 47: Push Buttons and LEDs © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 102: 11.35 Address-Map / Usb-Tree

    Low-/Full-/High-Speed Host Universal LVDS interface X29 / USB-Header X5 1bc7:1003 GSM/UMTS Module U11 at full speed 1546:01a5 Full speed Interface of GPS chip LEA-5H ONLY High-Speed Host at X5 0403:6011 ONLY High-Speed to Quad FTDI U42 Table 47: USB Port usage © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 103: 11.36 Baseboard Physical Dimension

    The phyCORE-Z500P(T) on the Carrirer Board 11.36 Baseboard Physical Dimension Figure 48: Baseboard physical dimensions © PHYTEC Messtechnik GmbH 2009 L-732e_0...
  • Seite 104 © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 105: 12 Revision History

    Revision History 12 Revision History Date Version numbers Changes in this manual 02-July-2009 Manual L-732e_0 First draft, Preliminary documentation. PCM-041 Describes phyCORE-Z500P(T) with PCB# 1310.1 phyCORE-Z500P(T) Baseboard. PCM-966 PCB# 1312.1 © PHYTEC Messtechnik GmbH 2009 L-732e_0...
  • Seite 106 © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 107: 13 Component Placement Diagram

    Component Placement Diagram 13 Component Placement Diagram Figure 49: phyCORE-Z500P(T) Component Placement, Top View © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 108: Figure 50: Phycore-Z500P(T) Component Placement

    Figure 50: phyCORE-Z500P(T) Component Placement, Bottom View © PHYTEC Messtechnik GmbH 2009 L-732e_0...

  • Seite 109: Index

    Dimensions........38 SMT Connector......7 Storage Temperature ....38 EEPROM........33 EMC ..........1 Technical Specifications ....37 Features ........3 U601 ..........33 Humidity ........38 VBAT ...........35 I²C EEPROM ....... 33 Weight..........38 Operating Temperature ....38 © PHYTEC Messtechnik GmbH 2009 L-732e_0...
  • Seite 110 © PHYTEC Messtechnik GmbH 2009 L-732e_0...
  • Seite 111 How would you improve this manual? Did you find any mistakes in this manual? page Submitted by: Customer number: Name: Company: Address: Return to: PHYTEC Technologie Holding AG Postfach 100403 D-55135 Mainz, Germany Fax : +49 (6131) 9221-33 © PHYTEC MesstechnikGmbH 2009 L-732e_0...
  • Seite 112 Published by © PHYTEC Messtechnik GmbH 2009 Ordering No. L-732e_0 Printed in Germany...

Diese Anleitung auch für:

Phycore-z500p

Inhaltsverzeichnis