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6.9
GPIOs
The Intel® SCH contains a total of 14 GPIO pins. Ten GPIOs are powered by the core power rail and
are turned off during sleep modes (S3 and higher). The remaining four GPIOs are powered by the
system controller hub suspend well power supply. These GPIOs and remain active during S3. The
suspend well GPIOs can be used to wake the system from the Suspend-to-RAM state.
The GPIOs are not 5 V tolerant.
Signal-Name
Description
GPIO_SUS0
#L_BKLTSEL_0_GPIO
(GPIO_SUS1)
#PM_PWRBTTN
Debounced copy of
(GPIO_SUS2)
#SMC_ONOFF
SCH_GPIOSUS_3
GPIO_0
GPIO_1
GPIO_2
GPIO_3
GPIO_4
GPIO_5
GPIO_6
#SLPIOVR (GPIO_7)
GPIO_8
#L_BKLTSEL (GPIO_9)
© PHYTEC Messtechnik GmbH 2009
Nr.
on-board
@
Type
circuit
X2
53
PD 10k Ohm
54
55
56
PD 100k Ohm
57
PD 10k Ohm
IPD 22k Ohm
58
PD 10k Ohm
59
PU 10k Ohm
60
PU 10k Ohm
IPU 22k Ohm
63
64
65
PU 10k Ohm
66
67
PU 10k Ohm
68
L-732e_0
SCH US15WP (T) (U2)
Trace length on
Remark
phyCORE
Used for
System
Managment
Used for
System
Managment
Used for
System
Managment
31
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