Sdio/Mmc Interface - Phytec phyCORE-Z500PT Hardware Bedienungsanleitung

6.3

SDIO/MMC Interface

The Intel® SCH has three integrated SDIO/MMC interfaces, all of them are available at connector X2.
Port 0 is equipped at the phyCORE-Z500WP(T) and accessible at X1. The LED D10 beside the
micro-SD holder shows if there is activity.
Port 0 and port 1 are 4 bit wide while port 2 is 8 bits wide. If port 0 should be used on the customer
board, it should not populated on the phyCORE-Z500WP(T).
Signal-Name Description
MMC_0_LED Activity output MMC0
#MMC0_CD Card detect MMC0
MMC0_WP Write protect MMC0
#MMC0_PWR Power enable output MMC0
MMC0_CLK Clock MMC0
MMC0_CMD Command MMC0
MMC0_DATA0 MMC0 dataline 0
MMC0_DATA1 MMC0 dataline 1
MMC0_DATA2 MMC0 dataline 2
MMC0_DATA3 MMC0 dataline 3
MMC1_LED Activity output MMC1
#MMC1_CD Card detect MMC1
MMC1_WP Write protect MMC1
#MMC1_PWR Power enable output MMC1
MMC1_CMD Command MMC1
MMC1_CLK Clock MMC1
MMC1_DATA0 MMC1 dataline 0
MMC1_DATA1 MMC1 dataline 1
MMC1_DATA2 MMC1 dataline 2
MMC1_DATA3 MMC1 dataline 3
MMC_2_LED Activity output MMC2
#MMC2_CD Card detect MCM2
MMC2_WP Write protect MMC2
#MMC2_PWR Power enable output MMC2
MMC2_CLK Clock MMC2
MMC2_CMD Command MMC2
MMC2_DATA0 MMC2 dataline 0
© PHYTEC Messtechnik GmbH 2009
on -board
Nr. @ X2
circuit
73
75
PU 10k Ohm
77
PU 10k Ohm
IPU 60k Ohm
79
SR 47 Ohm
83
SR 47 Ohm
PU 10k Ohm
85
SR 47 Ohm
IPU 75k Ohm
87
SR 47 Ohm
IPU 75k Ohm
89
SR 47 Ohm
IPU 75k Ohm
93
SR 47 Ohm
IPU 75k Ohm
95
SR 47 Ohm
97
99
PU 10k Ohm
103
PU 10k Ohm
IPU 60k Ohm
105
SR 47 Ohm
107
SR 47 Ohm
PU 10k Ohm
109
SR 47 Ohm
IPU 75k Ohm
108
SR 47 Ohm
IPU 75k Ohm
110
SR 47 Ohm
IPU 75k Ohm
113
SR 47 Ohm
IPU 75k Ohm
114
SR 47 Ohm
74
76 PU 10k Ohm
78 PU 10k Ohm
IPU 60k Ohm
80
SR 47 Ohm
84
SR 47 Ohm
PU 10k Ohm
86
SR 47 Ohm
IPU 75k Ohm
88
SR 47 Ohm
L-732e_0
SCH US15WP (T) (U2)
Trace
Type length on Remark
phyCORE
O CMOS3.3
I CMOS3.3
I CMOS3.3
O CMOS3.3
used on the
O CMOS3.3
phyCORE-
Z500WP(T)
I/O
CMOS3.3
MMC/SDIO
I/O
socket X1
CMOS3.3
55 mm
I/O
CMOS3.3
I/O
CMOS3.3
I/O
CMOS3.3
O CMOS3.3
I CMOS3.3
I CMOS3.3
O CMOS3.3
O CMOS3.3
I/O
CMOS3.3
I/O
CMOS3.3
45 mm
I/O
CMOS3.3
I/O
CMOS3.3
I/O
CMOS3.3
O CMOS3.3
I CMOS3.3
I CMOS3.3
O CMOS3.3
O CMOS3.3 55mm
I/O
CMOS3.3
I/O
CMOS3.3
at
23