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STUDER 4729
t/o
DIL-Switches:
There are
two 8-bits
D|L-switches
which are latched by lC
116
and lC 123
(HC
5a1).
They allow
the
user
to set up some machine functions
(see >x).
MonitorVolume:
The
monitor's volume can be set by the micro-processor by writing an
I
bit value
to a DAC (on print
1.629.201).
Interrupt Decode:
There
are
two interrupt sources:
.
keyboards
r
ES-bus
ln order
to
know where
the interrupt comes from, they are both latched by lC
122.
Serial
Communication Controller:
The SCC
is
shared between
the
ESTRIB
and
the CONTROL processor. Therefore,
the
data buses of both processors must
have
the possibility
to
be connected to
the
SCC.
This
is
achieved
by lC
1
15 (Octal
Bus
Tranceiver)
which can connect the
bus
to the SCC or isolate
it.
Note:
the lC
115 is
controlled
bythe
signal SEL_SCC_2.
This signal must be free
of
any spikes as these would interconnect both data buses of
the
CONTROL and
the ESTRIB processors leading
to a
possible hang-up
of both systems. The signal
SEL_SCC_2 is generated by
a
PROM,
this can lead to
the problems
above as the
outputs of the PHOM are not defined when the address at
the input changes.
For
this reason, the signal
is
"filtered" by
the signal SCC_ACCESS,
i. e.
the bus is only
connected when the CONTROL
processor
has
the control over the SCC
and
when
it
wants
to read/write
data.
Port
1:
Port 1 is used
to communicate with the
ESTRIB processor. There
are 7 data lines
and
1
line
for the NMI interrupt generation
(see 4.8.2).
Port
2
PorI2
is used
to
set up the function mode of
the
CONTROL
processor
on
reset
and
it
is used to
read
the cuewheel pulses (edge detector input on
P20)
and to
generate
the
SCC_ACCESS
signal. Only
if
the delayed
RESET
signals
on pin 9,
't0
and 11 of
lC
111 (HC 4053
-
Triple
Analogue Switch) are low, ports P20,
P21
and
P22 are switched
to
010,
thus setting mode
0
to
the CONTROL
processor (pin
13,
2
and
5
of lC
111).
E
4/6
EDITION:9.
März 1990
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