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STUDER
A729
4.3
Mother Board
(1.629.200)
4.3.1 Power
Supply
+5V
+ 12V
-
12v
4.3.2 Bus
Controller
This voltage
is supplied by a switching regulator (lC 1,
L296).
The softstart
rise
time is set by the capacitor on pin
5
of the
L296 (the chip applieation
note
suggests
a
value of
2.2yF
which gives
a
rise
time
of
100
ms). The
capacitor on
pin
13 sets
the reset delay (a value of 2.21tF gives
a
delay
of
100 ns). R2
and
C4
define the oscillator
frequency. D1
is
a recirculation
diode.
L1,
C1 and
C2
form the
output filter
of
the regulator.
This
voltage is regulated by a
LM
317 (lC 2). The
output voltage of the regulator
is
fixed by
R5
and
R6.
D2 is
a
recirculation
diode. C8 and C9 work as filter. D3
is a
protection
of the
regulator
for the case the mains would immediately be
short
circuited.
Same as
for +
12
V.
M
icro-processor System
The
BUS CONTROLLER is
composed
by
the
following
items:
r
HD 63A03
RP,
B-bit
CMOS
micro-processor
r
an
EPROM of
32 kBytes
r
a RAM
of 8 kBytes
r
an
address bus demultiplexer
r
an
address
decode circuit
The processor operates
in
multiplexed mode (MODE
2),
(with internal
RAM,
without internal
ROM).
The crystal
frequency
is
fixed to 4.9152 MHz (which gives
a
frequency
of
38.4
kHz
for
the
ES Bus
when
divided by
128).
The RD and WR signals are generated by three NAND gates (tC 110)
which
decode the
R/W signal with the
E
clock
(the
main
clock
of
the microprocessor).
There
are
two
l/Os
for
the
Bus
Controller:
r
the
SCG (Serial
Communication Controller)
r
the
8-LED
display
The SCC is
the
interface between
the
Bus
Controller and
the
ES
Bus.
lt
converts
the parallel data
of
the processor to the bus asynchroneous data format.
The
WR signal must
be
delayed
for the
SCC,
this is effected by
R131
, C154
and
tC
1
37.
t/o
EDITION:9.
Mäz
1990
E
4/3
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