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The list below gives more detailed information about each
pin marked *.
3 a) In 4:3 sets with 4 Mbit program memory, pin 3 inputs
status information (line out status) from the adjustable
audio module. It indicates whether the module is in use
or not, that is, whether the plug is connected or not. If
the plug is connected, transistor ta9 does not conduct
and pin 3 is high. This activates a three level mute se-
lection: 1) TV's speakers are muted, 2) TV's speakers
and adjustable audio module are muted or 3) no mute.
The circuit icf4 is not installed and the link to the pic-
ture tilt adjustment is disconnected.
b) In all 16:9 and all 8 Mbit program memory sets, pin 3
outputs a picture tilt adjustment. In these cases, infor-
mation from audio module is disconnected. With the
tilt adjustment the picture declination caused by the
magnetic field of the earth can be compensated for.
Depending on the control voltage, transistors tt5, tt6
and tt7 drive the voltage either from +12 Vr via the can-
celler coil to +5 Vr (low control voltage, tt6 conducts) or
from +5 Vr via the canceller coil to ground (high control
voltage, tt5 and tt7 conduct).
6 a) In 4:3 sets with 4 Mbit program memory, pin 6 oper-
ates as an indication of the RGB status (rf51 is installed).
If the RGB connection is in use, transistor tq4 does not
conduct and pin 6 is high.
b) In all 16:9 and all 8 Mbit program memory sets, pin 6
operates as an indication of the RGB status (= scart pin
16 high) and TA700 status via icf4 (rf51 is not installed).
The software periodically checks the status by feeding
out a high level from µC pin 9 to icf4-4 pin 13, and if
icf4-4 pin 12 is high (RGB status on), pin 11 feeds a high
level out to µC pin 6.
The same checking routine takes place for the TA700
status, but this uses µC pin 8 and icf4-3. During this
check, µC pin 43 (A18) is always low. This means that
the levels on pins 8 and 9 have no influence on the data
banking of the EPROM.
8/9 When µC pin 43 is high, these pins select, via icf4-1 and
icf4-2, the required data bank, either 1, 2 or 3.
When µC pin 43 is low, only data bank 0 is in use, thus
pins 8 and 9 have no influence on data banking, but
they can be used for other functions.
43 Pin 43 is an address line that is used for data banking of
the 8 Mbit program memory. When the pin is in a low
state, data bank 0 is selected, and when high, either 1,
2 or 3 are selected. For the 4 Mbit memory, pin 43 is a
normal address line (A18)
47 a) In multistandard sets, pin 47 feeds out a strobe pulse
(low) for the shift register on the IF block
b) In non multistandard sets, pin 47 drives the switch-
ing transistor T501 on the IF block. During channel
search (APSi), pin 47 is high
48/49
The combination of levels on these pins determines the
working state of the receiver as follows:
48 / P_on 49 / R_on Description
H
H
L
L
H
L
L
H
The receiver is in service standby mode whenever it
has been set to service mode by pressing the -vol /
menu, TV and i buttons, but not yet switched on by
pushing the TV button twice. Service mode is indicated
by the rec LED (illuminated), as well as rec and service
standby modes.
50 a) During startup phase, pin 50 feeds out a positive
going reset pulse for the sound processor.
b) By sensing the load on the reset pulse, pin 50 de-
tects whether or not the subwoofer is installed. If the
subwoofer is installed, resistor Ra107 is also present in
which case the amplitude of the reset pulse is smaller
than it is when Ra107 is absent. This check takes place
during the configuration phase (in service mode when
the red button is pressed).
51 a) During the configuration phase, pin 51 checks the
resistor ra10 via transistor ta10 (b-e) in order to identify
the picture tube ratio. Low resistance indicates 16:9 and
high resistance 4:3
b) During normal operation the audio amplifier can be
muted by a high level on this pin (central mute)
52 a) In the configuration phase, pin 52 checks the possi-
ble installation of a scart 3 module by checking the re-
sistor ra26 (on the scart 3 module)
b) Pin 52 operates as a status input pin from scart 3
AND gate, icf4
The AND gate icf4 operates as a function expander in all
16:9 sets (4 and 8 Mbit program memory) as well as in all
sets equipped with 8 Mbit program memory (4:3 and 16:9).
In these cases, the jumpers rf30 (program memory pin 31),
rf31 (program memory pin 1), rf48 (µC pin 3) and rf51 (µC
pin 6) are not installed.
In 4:3 sets with 4 Mbit program memory, the AND gate is
not installed, but the above mentioned jumpers are in-
stalled.
For a more detailed description, refer to microcontroller
pins 6, 8, 9 and 43.
Reset circuit, icf5
The microcontroller is reset by a special reset circuit, icf5
(TL7705A). When the receiver is switched on, pin 5 feeds a
low level to pin 14 of the microcontroller until the +5 Vstb
on the monitoring pin 7 (sense) reaches a level of +4.55 V.
After that the reset continues for about 30 ms. Then pin 5
goes high and the microcontroller is reset. The reset delay
time of 30 ms is determined by capacitor Cf21 on pin 3.
If the +5 Vstb drops below the 4.55 V threshold level even
for a moment, reset takes place immediately and the
microcontroller is blocked causing the receiver to switch
to micropower standby mode.
Micropower standby mode,
power supply does not operate
TV on mode, Vr, Vp and Vstb
available
Rec mode, Vr and Vstb available,
Vp not available
Service standby, Vstb available,
but not Vr neither Vp
17
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