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Deflection Stages; Vertical Deflection; Horizontal Deflection - Hitachi CP2896TA Wartungshandbuch

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DEFLECTION STAGES

- Vertical deflection

- Horizontal deflection

Vertical deflection
The TDA8354 is a DC-coupled Vertical Deflection output
circuit containing an internal vertical flyback generator and
a guard circuit. The output amplifiers and flyback genera-
tor are fitted with power FETs. The IC is thermally protected
and in addition it is protected against short circuits between
the outputs and from the output pin to ground and to the
supply voltage.
Functional description
Symmetrical vertical pulses from the deflection processor
TDA9151 are fed via pins 11 and 12 to a current driven
differential input circuit. The current to voltage conversion
is carried out by resistor rs4 via input pin 3. The voltage on
pin 3 is compared with the feedback information on pin 2.
The feedback information is taken from the output current
through the deflection coil measured across resistors Rs2,
Rs3 and Rs5.
The signals are amplified using a vertical driver circuit in a
bridge configuration.
The deflection coil is connected between the phase oppo-
sition driven amplifiers at output pins 5 and 9. The output
current is determined by the value of resistor rs4. The re-
sistor network (VD6xx), connected in parallel with the de-
flection coil, damps down the high frequency oscillation
which tends to be generated at the end of the flyback pe-
riod. Resistor rs6 on pin 13 is added to compensate for the
current differences in the dumping resistors during the scan
and flyback period.
The operating supply voltage of +16 V on pins 4 and 10,
and the flyback supply voltage of +50 V on pin 7 are taken
from the diode split transformer Mk1. Operation with two
supply voltages (class G) makes it possible to set both sup-
ply voltages independently to their optimum values. In this
way a very high efficiency is achieved. Due to the bridge
configuration, a decoupling capacitor is not necessary. Thus
almost the whole flyback supply voltage is available across
the deflection coil.
The output of an internal guard circuit is connected to pin
1. The sandcastle pulse (DSC) from the deflection proces-
sor is also connected to the same pin.
The guard circuit is activated in possible fault situations,
such as short circuits at output pins, an open deflection
loop, or circuit overheating. In such cases the guard circuit
increases the DC level on pin 1 to 2.5 V. This is the same
DC level as the blanking level of the sandcastle pulse. This
causes blanking of the screen that protects the picture tube.
Horizontal deflection
The horizontal drive signal from the deflection processor
is fed to the driver transformer Mk2 via a pulse shaping
network consisting of transistors tk6, Tk1, Tk2, and associ-
ated components. The circuit Dk5, Rk30 and Ck17 limits
the switching transients of Tk2. The +17 V supply voltage
for the transformer is taken from the power supply. The
secondary winding of the transformer is connected to the
base of the line output transistor Tk3, which drives the di-
ode split transformer Mk1 and the line output stage.
The functional description of the line output stage starts
from the time t5 when the drive signal becomes negative,
the line scan period is stopped and the line flyback period
t1 starts (picture below).
Iscan
t5 t1
t2
t3
Line flyback (t1...t3)
Due to the cut off of the Tk3 collector current, the energy
stored in the deflection coil at the end of the scan period
flows to flyback capacitor Ck24. The energy flow contin-
ues until time t2, when all energy has been transferred and
the collector voltage reaches its maximum value. The cur-
rent then changes direction and energy from the capacitor
flows back to the deflection coil. At time t3 the flyback ca-
pacitor is discharged and the voltage across it is 0 V. It
then becomes negative as the deflection coil starts the scan
period by feeding its energy to capacitor Ck27 (and Ck33).
Line scan (t3...t5)
At time t3, when the deflection coil starts to feed its energy
to Ck27, current begins to flow via diode Dk7. At time t4,
which is the mid point of the line scan, the drive pulse on
the base of Tk3 becomes positive again and the deflection
current can flow via transistor Tk3 and diode Dk8. From
time t4 to t1, the deflection current changes direction and
energy moves from Ck27 into the deflection coil. At time
t5, that is the end of line scan, the drive signal of Tk3 be-
comes negative and the flyback period begins again.
To achieve continuous operation, the energy from the
power supply is stored in the primary winding of Mk1 (pins
6 and 3) during the scan period when Tk3 is saturated. Some
of this energy is used to compensate for the deflection
losses.
Deflection corrections
The parabolic E-W correction pulse from the deflection
processor is fed through transistors ts1 and ts2 to the base
of transistor Tk4, which drives the E-W correction circuit
consisting of capacitors Ck26, Ck28, diode Dk8 and bridge
transformer Mk3.
t4
t5 t1
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