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Field memory, ic14
Field Memory 1 (FM1) is a 3 Mb, high-speed Dynamic Ran-
dom Access Memory (DRAM). The circuit is used as a
memory circuit in the 50 to 100 Hz upconversion and in
certain horizontal zoom functions.
The luminance and chrominance data are input from the
A/D-converter to pins 2...13.
The write operation is performed using the input control
signals RSTW (reset write) on pin 15, SWCK (serial write
clock) on pin 14 and ENW (enable write) on pin 16. The
write clock (SWCK / CLK27_1) frequency is 27 MHz. The
ENW signal enables memory writes only on every second
clock cycle.
The read operation is performed using the read output
control signals RSTR (reset read) on pin 22, SRCK (serial
read clock) on pin 23 and ENR (enable read) on pin 21.
The read clock (SRCK / CLK) frequency varies depending
on the picture format. The IQTV is able to generate the
following formats (implementation depends on the feature
box and software):
36.000 MHz = - 25.0 % hor compression
30.375 MHz = - 12.5 % hor compression
27.000 MHz =
0
23.625 MHz = + 12.5 % hor expansion
20.250 MHz = + 25.0 % hor expansion
All vertical compression is carried out by the deflection
processor. Only the DB710 and DB700 comprise the verti-
cal expansions (FM2 required).
The luminance and chrominance data are output to the
IQTV2 circuit from pins 24...35.
IQTV2 circuit, ic18
The main function of the IQTV2 (Improved Quality TV) cir-
cuit is to perform the upconversion, which reduces the
flicker caused by interlacing. The idea of the upconversion
is that the interlaced 50 (60) Hz scan will be converted to a
100 (120) Hz scan format.
The flicker reduction (upconversion) in the DB711 module
is based on a field repetition algorithm for both luminance
and chrominance signals. The field repetition method uses
zero degree interpolation and displays the original field
twice.
The characteristics of the IQTV2 make it possible to utilize
both the horizontal and vertical zoom functions, but be-
cause there is only one field memory, only the horizontal
zoom can be utilized. Thus all vertical zoom functions are
performed using the deflection controller circuit.
Picture sharpening is implemented not only in the hori-
zontal direction, but also in the vertical direction. The peak-
ing stage consists of high pass and band pass filters which
emphasize the middle band frequency range where most
of the details and edges are located.
The colour transient improvement (CTI) makes the slopes
of colour edges steeper by controlling the inputs between
the delayed, look ahead and current chrominance signals.
A new feature in the CTI of the IQTV2 circuit is that the
center of the transient always stays at the same point in
comparison with input and output signal.
The luminance transient improvement (LTI) is performed
by taking the 3-point median of three intermediate signals,
peaked, maximum and minimum. As a result of the LTI
process the luminance transients are made steeper with-
out any undershoots or overshoots.
The histogram equalization (HEQ) system is designed to
carry out an automatic contrast enhancement. The system
no compression / no expansion
is designed to give a uniform histogram for the output pic-
ture signal, changing the original pixel values for new ones
using a non-linear mapping. As a result, both under and
over contrasted picture signals are equalized to have the
desired contrast and gray level distribution.
Pin description of ic18:
Pin
Symbol
1, 5-12, 14-15,
18-21, 100
D0_FM1...
D15_FM1
2, 16, 41,
56, 81
+3.3V (core)
3, 28, 61, 77
+5V (i/o, AC)
4, 29, 60,
69
13, 34, 78
+5V (i/o, DC)
17, 37, 57,
79, 99
GND (CORE)
22
FM1_ENR
23
FM1_ENW
24
FM1_RSTW
25
HS_IPLL
26
FM2_ENW
27
FM2_ENR
30
CLK_IPLL
(CLK27_1)
31
CLK_OPLL
(CLK)
32
VS_50
33
HS_OPLL
35
HS32
36
FM_RSTR
38
SDA
39
SCL
40
FSY
42
+5V (analog)
43
VBIAS
44, 47, 49, 51
GND (analog)
45
VT
46
Vref
48
AY
50
AV
52
AU
53
RST
54
TEST_EN
55
VS_50_100
58-59, 62-67,
70-76, 80
Q0_FM2...
Q15_FM2
68
DIG_OUT8
82-89, 91-98
D0_FM2...
D15_FM2
90
SYNC_SEL
After digital signal processing (DSP), the IQTV2 circuit con-
verts the signals to analog form and outputs them from
pins 48 (Y), 52 (U) and 50 (V).
The colour difference signals are low pass filtered and out-
put from module pins Q102-3 (U) and Q102-2 (V). The lu-
minance signal is first amplified by transistors t18 and t19,
then the signal is low pass filtered and output from mod-
ule pin Q102-4.
Description
Data input from FM1
Power supply for logic
Power supply for I/O
GND (i/o, AC)
Ground for I/O
Power supply for I/O
Ground for CORE
Read enable, FM1
Write enable, FM1
Reset write, FM1
Horizontal sync
Write enable, FM2
Read enable, FM2
System input clock
(27 MHz)
System output clock
Vertical sync
Output horizontal sync
32 kHz horizontal sync
Reset, FM2W/R, FM1R
IIC-bus, serial data
IIC-bus, serial clock
Format sync for ADC
Analog supply voltage
for DAC
Analog
Ground for DAC
Analog
Current reference
for DAC
Analog Y output
Analog V output
Analog U output
System reset
Test mode enable
Double frequency
vert sync
Data output to FM2
9th bit in digital output
Data input from FM2
Selection of sync mode
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