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Sharp VL-C780S Serviceanleitung Seite 177

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"6. Flow of playback C-signal
4s described in the flow of playback Y-signal, the components below 100 MHz damped in C513, is supplied to
lin (16) of 1C201 after passing through the buffer of Q410. Then it is amplified in PB AMP, and supplied to LPF
hrough the record and playback switch. The playback signal, whose unnecessary FM Y signal is damped by
PF in the IC and only low band C-signal taken out, passes through the record and playback switch and ACC
\MP, and is supplied to the main converter circuit. The signal of 5.06 MHz is sent to the main converter circuit
rom the sub-converter circuit the same as in recording, whose output becomes the original C-signal of 4.43
AHz.
'he playback signal contains time axis fluctuation (frequency and phase fluctuation) due to tape speed fluctu-
ition, irregular rotation of video head, and tape expansion. Namely, the played back !ow band conversion
wurst signal is played back by fsc'= 40.125 fH' + A f. Here, fH' represents fH + A fH, i.e., frequency Tluctu-
ition due to tape speed fluctuation, and SIDE LOCK circuit corrects large fluctuation like 40.125 fH'. On the
yther hand, fluctuation such as + A f due to irregular rotation of video head and tape expansion is corrected
vy APC loop. Namely, frequency and phase fluctuation is corrected by APC loop usually, while SIDE LOCK cir-
cuit operates when frequency fluctuation is beyond correction by APC loop, and pulls it back quickly to the
ock range of APC. The SIDE LOCK circuit detects the presence of error signal every 8H, outputs a pulse from
jin (29), and corrects APC loop via R521.
'hese correction signals control 321 fH VCO and oscillate at 321 fH' + 8A f. The output is divided into 1/8 to
xecome 40.125 fH'
+ Afand supplied to ROTARY (PS) circuit. Here, when playback is by CH1 and CH3 head
he same as in recording, the phase is advanced by 90 degrees every 1H, and when playback is by CH2 and CH4
ead, the phase is delayed by 90 degrees every 1H, and the signal is supplied to the sub-converter.
/XO which oscillated with the phase locked to the input burst signal in record mode is sent to the sub-
-onverter circuit as 4.43 MHz XO in playback mode, and the sub-converter output is (4.43 MHz + 40.125 fH' +
" f) and (4.43 MHz — 40.125 fH' + A f). The sub-converter output, whose (4.43 MHz + 40.125 fH' + A f) com-
yonent is taken out, takes the same route as in record mode, and is sent to the main converter circuit. There-
'ore, the main converter output becomes the component of sum and difference of playback C signal (40.125
'H' + A f) and (4.43 MHz + 40.125 fH' + A f) inputted in pin (18).
The output signal from the main converter circuit, passing through the record and playback switch in the IC, is
sutputted from pin (8), and supplied to 4.43 MHz BPF of FL501. FL501 obtains 4.43 MHz, a differential compo-
rent between (40.125 fH' + A f) and (4.43 MHz + 40.125 fH' + A f), namely C-signal with no fluctuation. The
dlayback C-signal thus obtained is inputted in pin (11) of 1C201, and outputted from pin (12) after the burst
signal recovers the original amplitude in the burst de-emphasis circuit. Then it is supplied to the comb filter
>L501, here having the cross talk component of C-signal from the adjacent track eliminated. The comb filter
sutput is inputted to pin (14), and outputted from pin (20) through COMB AMP in the IC, the record and play-
gack switch,and PBAMP.
The playback C-signal thus obtained is level-adjusted in the resistance divider and inputted to pin (7) of C220.
Then it passes through the record and playback switch in the IC, and is mixed with the playback Y-signal by
ust the same route as EE C-signal to become a playback video output signal.
16
yt
Scan"

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Diese Anleitung auch für:

Vl-c690s