Renishaw SP25M Installationsanleitung Seite 33

SP25M installation and integration guide
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Acquisition mode select register (base address
+ 12)
This read/write register allows the software to set the AC3 to the required acquisition mode, with a selected interrupt (if required). The
command bits are shown below:
Bits 7 to 5 - INTERRUPT SELECTION
Writing the data pattern shown in table 6 will select the interrupt shown in the table. Interrupts are valid in acquisition modes 3, 4 and 5.
Upon power up, IRQ3 is selected.
Selection interrupt
line bit 765
000
001
010
011
100
101
110
111
Bit 4 - SHARED/LEVEL INTERRUPT MODE SELECTION
Writing a '1' to this bit enables shared interrupt mode. Writing a '0' enables level interrupt mode. Upon power up, level interrupt mode is
selected.
Bit 3 - This bit is not used.
Bits 2 to 0 - ACQUISITION MODE
Writing the data pattern shown in the table below will select the acquisition mode in the table. Upon power up, mode 0 is selected.
Issued 12 2021
IRQ
IRQ3
IRQ5
IRQ7
IRQ9
IRQ10
IRQ11
IRQ12
IRQ15
IBM ISA bus definition
Serial port 2
Parallel port 2
Parallel port 1
Software
Reserved
Reserved
Reserved
Reserved
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