amp) is active HIGH and is routed from the device control via connec-
tor C (board A) Pin 2 to Q 602 which connects the input of the recor-
ding amplifier IC 602 to 0 V via Q 508. Also during recording and when
AUTO SPACE is operated, this control signal creates the music space
lasting approximately 4 s.
Muting of LINE OUT and MONITOR is realized by the forward-bias of
transistor 0 271 (HIGH signal at the base). The processor routes the
control signal MUTING playback to board A, connector C, Pin 5 as a
LOW active signal during the following functions: stop, rewind, fast for-
ward, music finder >I> and 44 and pause.
DIN output switched off = relay RY 1 idle, the contacts are open, tran-
sistor Q 355 is reverse-biased, as Q 354 becomes forward-biased due to
the RECORD command (HIGH active).
CLEAR MUTING playback = enabling of muting during the following
functions: play, record SB (standby) and record. The control signal
CLEAR MUTING playback (HIGH active) produced by the processor
is routed through connector C (board A) Pin 5 to IC 603, the output
Pin 10 of which changes to HIGH with a delay (C 601) and transistor
Q 351 becomes forward-biased. Due to AND gating with Q 352, the
muting transistor Q 271 cannot become reverse-biased via 0 353 until
Q 352 is forward-biased. Q 352 is always forward-biased when the vol-
tage of the power supply unit is at its correct level, HIGH signal at con-
nector C (board A) Pin 7. The output Pin 11 of IC 603 applies a HIGH
level to the base of Q 352. This control signal is also routed to the base
of Q 355, This becomes forward-biased and switches on the relay and
the DIN output is connected into the AF signal. If the RECORD com-
mand is issued (HIGH active), Q 354 becomes forward-biased and thus
renders 0355 reverse-biased. The DIN output is disconnected.
Recording level indications
VU: The LINE OUT output signal is amplified with the display ampli-
fier Q 273 via R 284 and routed to the VU meter via the full wave recti-
fier. The full wave rectifier ensures a precise indication and the VU me-
ter operates with damped return. VU is set for the 0 dB reference level
with VR 271. The transistor Q 274 mutes the instrument during all
LINE OUT muting functions.
Peak level: The tape type-dependent and treble equalized signal is de-
coupled from the output of the recording amplifier IC 602 Pin 4 with
C 545 and routed via the control VR 503 to the input Pin 2 of the inte-
grated display amplifier IC 605 which directly drives the LED's with its
outputs. With transistor Q 507 (forward-biased), the sen sitivity is swit-
ched over when the tape type selector switch S 21-3 is set to MET. The
display is inertialess with 5 LED's which indicate the magnetization of
the tape as a percentage.
Device control
Processor
All device and drive functions are controlled by a 4-bit microcomputer
with integrated 2 kbyte program memory. The clock frequency is ap-
proximately 500 kHz with CF 401 at Pins 24 and 25 of the processor
IC 409.
Reset
When the deck is switched on, the supply voltages stabil ize to their no-
minal values. With this LOW-HIGH edge at the reset input Pin 23 of IC
409, the program counter of the precessor is set to itsstart address and
the processor is enabled for its functional sequences. Via D 418 and
C 417, a clear pulse is routed to the D flipflop IC 408 Pin 1.
Inputs
The drive and memory control buttons are interrogated and processed
by the processor in the form of a clocked switch matrix. The positive
pulses of IC 409 produced at Pin 7 (decade 2) to Pin 9 (decade 4),
which are inverted with IC 406, serve as the working clocks. These
pulses have a mutual offset of 3 ms (see pulse diagram). When a drive
control button is operated, the signal is applied as a HIGH active pulse
(inverter IC 405) to the processor IC 409.
The contact sensor S 13 RECORD SAFETY (erasure block) is open
when a musicassette is inserted = HIGH signal. In thiscase, the proces-
sor ignores operation of the RECORD button.
The timer switch S 1 routes its inputs PLAY or REC as LOW active
signals to the processor.
OLL
The no-contact infrared light barrier system is applied. The infrared
emitter LED 406 is driven by the free oscillating oscillator IC 404 from
Pin 1 via 0415. The clock frequency is 1050 Hz and can be varied with
VR 401. This frequency is also routed to Pin 22 of the processor as the
reference frequency (see also end of tape switch-off). This clocking
principle ensures perfect resistance to constant light and interfering re-
flections. The light pulses are converted to electrical pulses by the pho-
totransistor Q 420 and these are processed by the comparator IC 404.
If the light barrier is obstructed (DLL ON), a wave-shaped HIGH level
is applied to the output of IC 404 Pin 7 for the duration of the obstruc-
tion and this is converted to LOW level with R 443, C 411 and D 410.
This LOW signal also occurs when the cassette sensor S 12 is closed
(cassette removed). Due to the LOW signal at Pin 41 (IC 409), the pro-
cessor recognizes DLL ON = cassette removed. The stop function is
executed, the LED STOP flashes and, in recording mode, the RECORD
function is cancelled. When the deck is set to PLAY, this operating sta-
te is stored after removal of the cassette.
End of tape switch-off
The information that the tape is running is passed on to IC 412 by a
multiple magnetic disc secured to the drive wheel of the take-up wheel.
This IC converts the alternating magnetic fields into electrical pulses.
These pulses are routed through C 414 to transistor 0418 which opera-
tes as a flipflop together with IC 406 Pins 7/10. The signals shaped in
this way are routed through R 457 to Pin 37 of IC 409. This tape-run-
ning frequency is compared by the processor with the 1050 Hz fre-
quency of the oscillator IC 404 which is applied to Pin 22 (IC 409). If
the tape-running pulses fail within a period of 1 s, e.g. due to a tape jam,
STOP is triggered off. In the event of tape-running malfunctions, the
1050 Hz (-± 5 %) frequency should also be checked, as this serves as the
reference frequency for switching off at the end of the tape.
Outputs
The outputs for the device functions (magnets and motors) are issued
by the processor as HIGH active signals. The course of the signals for
FF (fast forward) is used here as an example. The active HIGH signal of
the processor (Pin 10, IC 409) is routed to both the inverting driver
IC 402, Pin 1, and to the NAND gate IC 410, Pin 9. With the LOW sig-
nal at the output of IC 402, Pin 16, transistor 0412 becomes forward-
biased and applies the positive voltage of approximately 6 V to the FF
magnet. At the same time, the processor (IC 409, Pin 19 = U BAT) sto-
res the overexcitation signal in the D latch IC 408 Pin 6 for the dura-
tion of approximately 100 ms. This time signal (HIGH active) is routed
from the output Pin 7 to the NAND inputs of IC 410. The FF com-
mand is applied as a HIGH signal to Pin 9 of 1C410. For the duration
of the time signal (100 ms) at Pin 8, the output Pin 10 changes to LOW,
the inverting driver IC 402 causes transistor Q 409 to become forward-
biased with HIGH and drives the driver stage IC 401 Pin 11. Via Pin 10,
IC 401 applies the overexcitation voltage of — 16 V to the FF magnet.
After the time signal U BAT (100 ms) has elapsed, the diode D 404
holds the magnet until Q 412 switches off. This overexcitation ensures
rapid and reliable response of the magnets. Repeated overexcitation of
magnets already switched on is suppressed with the coupling diodes
D 419 to D 424. Example: The LOW signal FF at the output Pin 10
(IC 410) is routed via D 423 to the AND input Pin 1 and thus disables
overexcitation of the magnet PLAY which is being held.
IC 409
Prozessor
IC 408
Übererregung 1
Time: 100 ms
+ 7 V
6