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Schaltplane und Druckplattenabbildungen / Circuit Diagrams and Layout of PCBs
PA2/PA3
Schaltplane und Druckplattenabbildungen / Circuit Diagrams and Layout of PCBs
PA2/PA3
Schaltplane und Druckp
iC-Innenbeschaltungen / IC Block Diagrams
CXA 1100 P
Gp
GL
GH
| REF
voc
IN (R)
GND (R)
SIDE CHAIN
f/Q
{Q
fM
REF
VEE
IN (L)
GND (L)
GND
4094B
8-STAGE SCHIFT
REGISTER
8-BIT STORAGE
REGISTER
3-STATE OUTPUTS
0p|0% [02 0504 os fo|
4
|5
|6
|7
|14
13
|12 | 11
TA 8135 P
Vcc
ALC
IN-1
OFF
NON ALC
MUTE
ON
NON ALC
ALC
NON ALC
IN-2
ALC
REC OUT-2
OUT 2
ST24C16
TEST 7
HV GENERATION
TIMING
& CONTROL
SDA 5
SLAVE ADDRESS
4
REGISTER
gE
Pie
SCL 6
+ COMPARATOR
|
=e
ADDRESS
COUNTER
A2 3
Al 2
X24C04
(8) Vec
(4) Vss
(Ove!
H.V. GENERATION
START CYCLE
OTN
jee
& CONTROL
CONTROL
LOGIC
(6) SCL
(3) Az
ae
ADDRE
2) A
By
AS
COUNTER
(1) Ao
D
DATA REGISTER
}—2Y
Dout
ACK
(PIN) DIP/SOIC
SAA 6579 T
RDDA
VREF
MUX
VDDA
VSSA
CIN
SCOUT
>
||
=
=
:
DIFFERENTIAL
DECODER
REFERENZ
VOLTAGE
RECONSTRUK
ANTI
57KHZ
ore
ALIASING
BANDPASS
SYMBOL
FILTER
DECODER
FILTER
'8th ORDER
QUAL
QUALITY:
COSTAS LOOP
BIT
VARIABLE AND
uiean oa
GENERATOR
FIXEDDIVIDER
«fg
CLOCK
TESTLOGIC AND
REGENERATION
riley
SAA6579T
OUTPUT
AND SYNC
SELEKTOR SWITCH
ay
ak St
24C00
RDCL
157
osco
oscl
vppD
vssD
TEST
TSTLD
sc.
CONTROL
COMMAND/ADRESS
LOGIC
REGISTER
INPUT/
SDA
OUTPUT
SHIFT REGISTER
BUFFER
NC
= NO CONNECT
Vss
= GROUND
Veco
= SUPPLY VOLTAGE
SCL = SERIAL CLOCK
X 24 COO
GRUNDIG Service
3-54
GRUNDIG Service
3-55
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