Beckhoff CB7268 Originalhandbuch Seite 54

BIOS
8.4.2.1 PCI Express Configuration (Q370)
Aptio Setup Utility - Copyright (C) 2020 American Megatrends, Inc.
Chipset
┌─────────────────────────────────────────────────────────────────┬────────────────────────────────┐
│ PCI Express Configuration │PCI Express Clock Gating │
│ │Enable/Disable for each root │
│ PCI Express Clock Gating [Disabled] │port. │
│ PCIE Port assigned to LAN 5 │ │
│ Peer Memory Write Enable [Disabled] │ │
│ Compliance Test Mode [Disabled] │ │
│ PCIe─USB Glitch W/A [Disabled] │ │
│ │ │
│ PCI Express Root Port 1 PCIe RP N │ │
│ (disabled on BeaCon) │ │
│ PCI Express Root Port 2 PCIe RP N │ │
│ (disabled on BeaCon) │ │
│ PCI Express Root Port 3 PCIe RP N │ │
│ (disabled on BeaCon) │ │
│ PCI Express Root Port 4 PCIe RP N │ │
│ (disabled on BeaCon) │ │
│ PCI Express Root Port 5 Reserved for ethernet ├────────────────────────────────┤
│ │><: Select Screen │
│ │^v: Select Item │
│ │Enter: Select │
│ PCIe Root Port 9 (to M.2─Slot0) Not present in this SKU │+/─: Change Opt. │
│ PCIe Root Port 10 (to M.2─Slot0) Not present in this SKU │F1: General Help │
│> PCIe Root Port 11 (to M.2─Slot0) │F2: Previous Values │
│ PCIe Root Port 12 (to M.2─Slot0) │F3: Optimized Defaults │
│ PCIe Root Port 13 (to M.2─Slot1) Not present in this SKU │F4: Save & Reset │
│ │ESC: Exit │
│ PCI Express Root Port 17 PCIe RP N │ │
│ (disabled on BeaCon) │ │
│ PCI Express Root Port 18 PCIe RP N │ │
│ (disabled on BeaCon) │ │
│ PCI Express Root Port 19 PCIe RP N │ │
│ (disabled on BeaCon) │ │
│ PCI Express Root Port 20 PCIe RP N │ │
│ (disabled on BeaCon) │ │
└─────────────────────────────────────────────────────────────────┴────────────────────────────────┘
Version 2.20.1275. Copyright (C) 2020 American Megatrends, Inc.
54 Version: 1.0 Computerboard