Inhaltsverzeichnis - Siemens EB 400 Handbuch

Inhaltsverzeichnis

1 Einleitung ................................................................................................................................8
1.1 Vorgehensweise beim Entwickeln eines eigenen PROFINET IO Device mit ERTEC 400 .................... 8
1.2 Aufbau des EB 400 ................................................................................................................................ 9
1.3 Features des EB 400.............................................................................................................................. 9
1.4 Blockschaltbild des EB 400 .................................................................................................................... 10
2 Hardwarestruktur des EB 400 ...............................................................................................11
2.1 ERTEC 400 ............................................................................................................................................ 11
2.1.1 Funktionsübersicht............................................................................................................................ 11
2.1.2 Betriebsmodi des EB 400 ................................................................................................................. 13
2.1.3 Bootmodi des EB 400 ....................................................................................................................... 13
2.1.4 Integriertes Prozessorsystem ARM946E-S ...................................................................................... 13
2.1.5 PCI-Interface .................................................................................................................................... 14
2.1.6 IRT-Switch ........................................................................................................................................ 14
2.1.7 Interruptsystem des EB 400 ............................................................................................................. 15
2.1.7.1 Interrupts zum ARM946E-S ...................................................................................................... 15
2.1.7.2 Host-Interrupts .......................................................................................................................... 16
2.1.7.3 Host/ARM946-Interrupts ........................................................................................................... 16
2.1.8 Externes Memory-Interface (EMIF)................................................................................................... 17
2.1.9 Debug- und Trace-Interface.............................................................................................................. 17
2.1.10 Serielle asynchrone Schnittstellen .................................................................................................... 17
2.1.11 General Purpose Interface (GPIO) ................................................................................................... 18
2.2 Speicher am EB 400 ............................................................................................................................. 19
2.2.1 SDRAM-Interface.............................................................................................................................. 19
2.2.2 SRAM-Interface ................................................................................................................................ 19
2.2.3 Flash-Interface.................................................................................................................................. 19
2.2.4 NAND-Flash ..................................................................................................................................... 19
2.2.5 Serielles Flash/EEPROM.................................................................................................................. 20
2.3 CPLD-Schnittstelle ................................................................................................................................. 20
2.4 Resetsystem des EB 400 ....................................................................................................................... 21
2.4.1 Resettaster ....................................................................................................................................... 21
2.4.2 Watchdog und Software-Reset......................................................................................................... 21
2.4.3 Power-On-Reset beim Betrieb als PCI-Karte.................................................................................... 22
2.5 Taktsystem des EB 400 ......................................................................................................................... 22
2.5.1 Taktversorgung PCI-Bridge .............................................................................................................. 22
2.5.2 Taktversorgung des EB 400 im RMII Betrieb.................................................................................... 22
2.5.3 Taktversorgung des EB 400 im MII Betrieb ...................................................................................... 22
2.5.4 Takt für F-Timer ................................................................................................................................ 23
2.6 Ethernetinterface des EB 400 ................................................................................................................ 23
2.6.1 RMII-Interface................................................................................................................................... 23
2.6.2 MII-Interface ..................................................................................................................................... 23
3 Speicheraufteilung EB 400....................................................................................................24
3.1 Memory Mapping.................................................................................................................................... 24
3.2 Detaillierte Speicherbeschreibung.......................................................................................................... 25
4 Betriebsarten des EB 400......................................................................................................27
4.1 Betrieb des EB 400 im PCI-Mode........................................................................................................... 27
4.1.1 Hochlauf des EB 400 ohne programmierten Flash ........................................................................... 27
4.1.2 Hochlauf des EB 400 mit programmierten Flash .............................................................................. 27
4.2 Betrieb des EB 400 im Stand-Alone-Mode............................................................................................. 29
4.2.1 Betrieb des EB 400 ohne Flash ........................................................................................................ 29
4.2.2 Betrieb des EB 400 mit programmierten Flash ................................................................................. 29
4.2.3 Betrieb des EB 400 mit LBU-Betrieb................................................................................................. 29
5 JTAG - Schnittstelle ..............................................................................................................29
6 Einstellungen am EB 400 ......................................................................................................30
6.1 Voreinstellung des EMIF-Interface ......................................................................................................... 30
6.2 CPLD am EMIF-Interface ....................................................................................................................... 30
7 Stecker des EB 400 ................................................................................................................32
7.1 PCI-Schnittstelle..................................................................................................................................... 33
7.2 LBU-Schnittstelle.................................................................................................................................... 34
7.3 Programmierschnittstelle CPLD ............................................................................................................. 35
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EB 400 Handbuch
Version 1.2.3