Power Supply - Grundig GDV 100 D Servicehandbuch

GDV 100 D
IACK[7:0] Interrupt Acknowledge
IFETCHN Instruction Fetch
IPIPEN Instruction Pipe
IRQ[7,6,5,3] Interrupt request
MODCK Clock Mode Select
RESETN Reset
RMCN Read-Modify-Write Cycle
RTS1N, RTS2N Request To Send
RWN Read/Write
RXD1, RXD2 Receive Data
RXRDYN OP4
SCLK Serial Clock
SIZ[1:0] Size
TCK Test Clock
TDI Test Data In
TDO Test Data Out
TGATE1N, TGATE2N Timer Gate
TIN1, TIN2 Timer Input
TMS Test Mode Select
TOUT1, TOUT2 Timer Output
TXD1, TXD2 Transmit Data
TXRDYN OP6
VCC, GND System Power Supply, Ground
VCC SYN Synchronizer Power
X1, X2 Serial Crystal Oscillator
XFC External Filter Capacitor
IC7201
DSVP: DVD Stream Manager/Video Processor
Function Overview
This IC combines two functions: a DVD Stream Manager (DSM) and
a DVD Video Post processor (DVP).
Description of DSM
The DVD Stream Manager is the interface between basic engine, the
video decoder, audio decoders and the host processor. It controls the
flow of incoming data from the Basic Engine to the respective decod-
ers. The general operation is as follows.
The Sector Processor is the input block which pre-processes the serial
data from the Basic Engine and stores it half-word wise into a Variable
Bit Rate (VBR) buffer in DRAM. In VCD and CDDA mode it also
captures Sub Code data and stores it half-word wise in the Sub Code
buffer in DRAM.
The memory manager (VBR buffer control) is responsible for buffer
management. It is a block which contains buffer parameters like
position of a buffer in DRAM and read and write pointers.
The Demux will read data from the VBR buffer and store the
demultiplexed data into some buffer in DRAM or in case of Sub Picture
Data, output it directly (Serial Sub Picture Out).
The Serial Sub Picture Out block will output data only if S_REQn is
active and the Demux is demultiplexing a Sub Picture Unit.
The Serial Video Out block will output data only if this block is enabled
and as long as there is data in the Video Buffer in DRAM and V_REQn
is active.
The Serial Audio Out will output data only as long as there is data in the
Audio and/or Audio Ext buffer. Data will be outputed with a clock
derived from the external audio clock A_CLK_REF. The frequency of
this clock depends on the audio output mode and should be configured.
Via the Host Interface the internal modules are configured and the
complete DRAM is accessible.
The DSM has 3 operational modes which are DVD, VCD and CDDA.
DVD mode
DRAM
Video
Demux
Audio
Audio-Ext
Host
Post_Nav
Sub-Code
Basic Sector
VBR
Engine Processor
GRUNDIG Service
Interrupt acknowledge lines
not used
not used
Provides an interrupt priority level to the CPU32
Selects the source of the internal system clock
System reset
Identifies the bus cycle as part of an indivisible read-modify -write operation
Serial module request to send outputs
Indicates the direction of data transfer on the bus
Serial input to the serial module
parallel output
External serial module clock input
Indicates the number of bytes remaining to be transferred for this cycle
Provides a clock for IEEE 1149.1 test logic
Serial test mode instructions and test data signal
Serial test mode instructions and test data signal
Counter enable input to timer
Time reference input to timer
Controls test mode operations
Output wave form from timer
Serial output to the serial module
parallel output
Power supply and ground to the MC68340
Power supply to VCO
Connections for an external crystal to the serial module internal oscillator input
Connection pin for an external capacitor to filter the circuit of the phase-locked loop
Sub Picture
Serial Sub Picture Out
Decoder
Video
Serial Video Out
Decoder
Audio
Serial Audio Out
Decoder
Host
Host Interface
Processor
In Figure 1, the data flow in DVD mode is given. In this mode the sector
processor receives a serial bitstream with sectors of 2064 bytes. The
header and CRC bytes are stripped, the remaining 2064 bytes are
stored half-word wise (16 bits) in the VBR buffer. In this mode the VBR
buffer is segmented into this sector size of 2048 bytes.
The Demux reads the sector data from the VBR buffer and demultiplexes
the data into the respective buffers. Sub Picture data is fed directly to
the output depending on SP_REQn.
Serial Video Out will read data from the video buffer and serialize it, if
V_REQn is active. Serial Audio Out will read data from Audio and/or
Audio Ext Buffer, depending on the audio mode. It will be outputed in
a I 2 S like format to the Audio Decoder. This Serial Audio Out is
controlled (clocked) by A_CLK_REF which depends on the audio
format selected.
VCD mode
DRAM
Video
Demux
Audio
Audio-Ext
Host
Post_Nav
Sub-Code
Basic Sector
VBR
Engine Processor
In Figure 2 the data flow in VCD mode is given. In this mode the sector
processor receives a serial bitstream with sectors of 2352 bytes. In
case of static data all mode 2 form 1 sectors are stored in the VBR
buffer. In case of real-time data (mode 2 form 2) only sectors which
contain Video or Audio (indicated by Submode byte) are stored into the
VBR buffer. In VCD mode the VBR buffer is segmented into a block size
of 4096 bytes. In this mode subcode data is stored in the Sub Code
buffer which has a size proportional to the VBR buffer.
The Demux reads the sector data (Video or Audio Pack) from the VBR
buffer and stores the PES (Packetized Elementary Stream) packets
into the respective buffer. Pack headers of packs containing a system
header are stored in the Host buffer. The Serial Video Out block reads
the PES packets from the video buffer and feeds the data (on request)
to the Video Decoder. The Serial Audio Out block reads the PES
packets from the Audio buffer and feeds the data to the Audio Decoder.
A_CLK_REF is now a multiple of 44.1kHz. Since there is no Sub
Picture stream in VCD the Serial Sub Picture Out block is not active in
this mode.
Descriptions
Video
Serial Video Out
Decoder
Audio
Serial Audio Out
Decoder
Host
Host Interface
Processor
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