Inhaltsverzeichnis
Werbung
Verfügbare Sprachen
Verfügbare Sprachen
GDV 130...
Chassisplatte / Chassis Board – Audio/Video Decoder
LA[0...21]
U201
LA0
12
13
LD0
A0
D0
LA1
11
14
LD1
A1
D1
LA2
10
15
LD2
A2
D2
LA3
9
17
LD3
A3
D3
LA4
8
18
LD4
A4
D4
LA5
7
19
LD5
A5
D5
LA6
6
20
LD6
A6
D6
LA7
5
21
LD7
A7
D7
LA8
27
A8
LA9
26
A9
LA10
23
A10
LA11
25
A11
LA12
4
A12
LA13
28
A13
LA14
29
A14
LA15
3
A15
LA16
2
32
A16
VCC
LA17
30
A17
R273
0
31
C218
A18
R272
open
1
A19
104
LA18
LCS3#
22
CE
+5VD
LA19
R275
open
LOE#
24
16
OE
GND
R274
0
R276
open
W27E040/080
J201
MRSTB
1
2
RESET
CLK/CE1
WRLL#
3
4
WE
ADDR/CE1
ROM EMULATOR
LA21
Debuging port
DIORDY
DIOCS16#
DACS1#
DACS3#
DA[0...2]
DD[0...15]
SST39VF040 Use only
U209
SST39VF040
LA0
20
21
LD0
A0
D0
LA1
19
22
LD1
A1
D1
LA2
18
23
LD2
A2
D2
LA3
17
25
LD3
A3
D3
LA4
16
26
LD4
A4
D4
LA5
15
27
LD5
A5
D5
LA6
14
28
LD6
A6
D6
LA7
13
29
LD7
3.2V
+3.65V
A7
D7
LA8
3
A8
LA9
2
8
A9
VDD
LA10
31
A10
D201
LA11
1
A11
LA12
12
1N5817
A12
LA13
4
C234
A13
LA14
5
24
104
A14
VSS
LA15
11
A15
LA16
10
7
WRLL#
A16
WE
LA17
6
30
LCS3#
A17
CE
LA18
9
32
LOW#
A18
OE
GRUNDIG Service
Platinenabbildungen und Schaltpläne / Layout of PCBs and Circuit Diagrams
+5VD
R202
4.7K
C212
+3.65V
XIN
TP201
TP202
R203
104
R271
3.3K
0
105
CLK
RST#
24
MRSTB
RESET
173
LCS0
LCS1#
174
LCS1
TP206
175
LCS2#
LCS2
TP207
LCS3#
176
LCS3
WRLL#
198
LWRLL
199
LWRHL
LOE#
170
LOE
LA0
204
LA0
LA1
205
LA1
206
LA2
LA2
LA3
207
LA3
LA4
2
LA4
3
LA5
LA5
LA6
4
LA6
LA7
5
LA7
LA8
6
LA8
LA9
7
LA9
LA10
10
LA10
LA11
11
LA11
12
LA12
LA12
LA13
13
LA13
LA14
14
LA14
15
LA15
LA15
LA16
16
LA16
+5VD
LA17
19
LA17
LA18
20
LA18
LA19
21
LA19
L202
FB2012
LA20
22
TP208
LA20
LA21
23
LA21
LD0
178
LD0
LD1
179
LD1
180
LD2
LD2
LD3
181
LD3
LD4
182
LD4
185
LD5
LD5
LD6
186
LD6
LD7
187
LD7
188
LD8
LD[0...7]
189
LD9
190
LD10
191
LD11
194
LD12
195
LD13
196
LD14
197
LD15
DRST#
R221
47
145
DRST#
HRST
DRD#
R224
47
150
DRD#
HRD/DCI_ACK
DWR#
R223
47
149
DWR#
HWR/DCI_CLK
143
TP204
HRDQ
TP205
142
HWRQ/DCI_REQ
DIORDY
R222
47
146
HIORDY
DIOCS16#
R225
47
151
HIOCS16
DACS1#
R226
47
152
HCS1FX
DACS3#
R227
47
153
HCS3FX
DIRQ
R220
47
144
DIRQ
HIRQ/DCI_ERR
DA0
R228
33
154
HA0
DA1
R229
33
155
HA1
DA2
R230
33
158
HA2
DD0
R204
33
122
HD0/DCI[0]
DD1
R205
33
123
HD1/DCI[1]
DD2
R206
33
124
HD2/DCI[2]
DD3
R207
33
125
HD3/DCI[3]
DD4
R208
33
126
HD4/DCI[4]
DD5
R209
33
127
HD5/DCI[5]
DD6
R210
33
128
HD6/DCI[6]
DD7
R211
33
131
HD7/DCI[7]
DD8
R212
33
132
HD8/DCI_FDS
DD9
R213
33
133
HD9
DD10
R214
33
134
HD10
DD11
R215
33
135
HD11
DD12
R216
33
136
HD12
DD13
R217
33
137
HD13
DD14
R218
33
140
HD14
DD15
R219
33
141
HD15
C205
C206
C207
C208
104
104
104
104
CE202
10µ/16V
GDV 130...
+3.65V
+3.65V
CE201
CE201
10µ/16V
10µ/16V
C213
C214
C215
C201
C202
C203
C204
C101
C102
C103
104
104
104
104
104
104
104
104
104
104
TWS/SEL_PLL1
TSD0/SEL_PLL0
TSD1/SEL_PLL2
U101
DOE/DSCK_EN
ES4318
+3.65V
C209
C211
C104
C105
C106
C107
C108
C109
C110
C111
104
104
104
104
104
104
104
104
104
104
CE102
+5VD
10µ/16V
C210
R261
1M
104
14
U208A
R270
1
2
7
74HC04
R262
220
C227
X201
C228
33p
27MHz
22p
2 - 14
GRUNDIG Service
Platinenabbildungen und Schaltpläne / Layout of PCBs and Circuit Diagrams
+5VD
C232
C128
104
104
14
U207F
14
U207A
14
13
1
12
2
7
7
74HC04
74HC04
MCLK
MCLK
C126
R120
27p
4.7K
R232
+5VD
33
R130
47K
MA0
R129
R121
MA1
47K
4.7K
MA2
MA3
R122
MA4
RES
not insert
MA5
MA6
MA7
R123
MA8
OPEN
MA9
39
MA10
MCLK
MA11
40
TBCK
BCLK_DVD
32
DSCK
LRCK_DVD
33
ASDATA_DVD
36
TP101
37
CS0#
TSD2
TP102
38
TSD3
TP103
RAS0#
47
CAS#
RBCK
46
RWS
45
WE#
RSD
41
DQMX
SPDIF_DOBM
42
TP104
SPDIF_DIBM
116
R119
0
XIN
PCLK2XSCN
117
+3.65V
PCLKQSCN
119
HSSCN
HSYNC
118
VSSCN
VSYNC
C112
106
YUV0
104
YUV0
107
YUV1
YUV1
108
YUV2
YUV2
109
YUV3
YUV3
110
YUV4
YUV4
113
YUV5
YUV5
114
YUV6
YUV6
115
YUV7
YUV7
100
R117
33
CS0#
DCS0
97
R116
33
CS1#
DCS1
R115
33
RAS0#
72
MA0
DRAS0
73
C129
C123
C122
C127
C124
C125
MA1
DRAS1
74
MA2
DRAS2
R113
33
CAS#
27p
27p
27p
open
27p
27p
69
MA3
DCAS
71
R114
33
WE#
MA4
DWE
70
MA5
TP105
101
R118
33
DQMX
MA6
DQM
102
R132
47
DSCK
MA7
DSCK
MA8
53
R101
10
MA0
MA9
DMA0
54
R102
10
MA1
MA10
DMA1
55
R103
10
MA2
MA11
DMA2
56
R104
10
MA3
DMA3
R105
10
MA4
57
DSCK
DMA4
58
R106
10
MA5
DMA5
61
R107
10
MA6
DMA6
62
R108
10
MA7
CS1#
DMA7
63
R109
10
MA8
DMA8
64
R110
10
MA9
RAS0#
DMA9
65
R111
10
MA10
CAS#
DMA10
66
R112
10
MA11
DMA11
WE#
77
DB0
DB0
DB1
78
DQMX
DB1
79
DB2
DB2
80
DB3
DB3
DB4
87
DB4
82
DB5
+3.65V
DB5
85
DB6
DB6
86
DB7
DB7
87
DB8
C116
DB8
88
DB9
104
DB9
89
DB10
DB10
DB11
90
DB11
93
DB12
DB12
94
DB13
DB13
DB14
95
DB14
96
DB15
DB15
160
I2C_DATA
AUX0
161
I2C_CLK
AUX1
162
HOST_DATA
AUX2
165
VFD_DATA
AUX3
166
VFD_STB
AUX4
167
VFD_CLK
AUX5
168
HOST_CLK
AUX6
HOST_CS
169
AUX7
49
R238
0
XIN
50
XOUT
not used when Flash Memory
48
APLLCAP
C219
47p
R277
1M
ª
14
U208B
C233
220
R131
0
3
4
14
U208C
104
7
5
6
74HC04
C230
C231
7
74HC04
open
open
C229
33p
14
U207E
11
10
SPDIF
7
74HC04
14
U207C
5
6
7
U207B
3
74HC04
4
7
74HC04
14
U207D
+3.65V
9
8
7
74HC04
L201
27MHZ
FB2012
YUV[0...7]
U102
21
2
DB7
A0
DQ0
22
3
DB6
A1
DQ1
23
5
DB5
A2
DQ2
24
6
DB4
A3
DQ3
27
8
DB3
A4
DQ4
28
9
DB2
A5
DQ5
29
11
DB1
A6
DQ6
30
12
DB0
A7
DQ7
31
39
DB8
A8
DQ8
32
40
DB9
A9
DQ9
20
42
DB10
A10
DQ10
19
43
DB11
A11
DQ11
45
DB12
DQ12
35
46
DB13
CLK
DQ13
34
48
DB14
CKE
DQ14
49
DB15
DQ15
18
CS
7
VCCQ
17
13
RAS
VCCQ
16
C113
CAS
15
4
104
WE
VSSQ
10
VSSQ
14
38
DQML
VCCQ
36
44
DQMH
VCCQ
C115
33
NC
104
37
41
NC
VSSQ
47
VSSQ
1
25
VCC
VCC
C114
50
26
104
VSS
VSS
KM416S1020CT-G07
U103
21
2
DB7
A0
DQ0
22
3
DB6
A1
DQ1
23
5
DB5
A2
DQ2
24
6
DB4
A3
DQ3
27
8
DB3
A4
DQ4
28
9
DB2
A5
DQ5
29
11
DB1
A6
DQ6
30
12
DB0
A7
DQ7
31
39
DB8
A8
DQ8
32
40
DB9
A9
DQ9
20
42
DB10
A10
DQ10
19
43
DB11
A11
DQ11
45
DB12
DQ12
35
46
DB13
CLK
DQ13
34
48
DB14
CKE
DQ14
49
DB15
DQ15
18
CS
7
VCCQ
17
13
RAS
VCCQ
C117
16
CAS
15
4
104
WE
VSSQ
10
VSSQ
14
38
DQML
VCCQ
36
44
DQMH
VCCQ
C119
33
NC
37
41
104
NC
VSSQ
47
VSSQ
1
25
VCC
VCC
C118
104
50
26
VSS
VSS
KM416S1020CT-G07
DB[0...15]
I2C_DATA
I2C_CLK
HOST_DATA
VFD_DATA
VFD_STB
VFD_CLK
HOST_CLK
HOST_CS
+5VD
C220
104
U204
8
1
VCC
A0
7
2
NC
A1
6
3
SCL
A2
5
4
SDA
VSS
AT24C02A
TO MAIN CIRCUIT DIAGRAM (P. 2-11)
2 - 15
Werbung
Inhaltsverzeichnis
