Inhaltsverzeichnis
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A
X
4
5
-
5
3
3
/
A
X
4
5
-
5
3
3
N
O
n
l
i
n
e
-
H
a
n
d
b
u
c
h
A
X
4
5
-
5
3
3
/
A
X
4
5
-
5
3
3
N
O
n
l
i
n
e
-
H
a
n
d
b
u
c
h
CODEC (Coding and Decoding) ................................................................................................................................................. 86
DDR (Double Data Rated) SDRAM............................................................................................................................................. 87
DIMM (Dual In Line Memory Module) ......................................................................................................................................... 87
DMA (Direct Memory Access) ..................................................................................................................................................... 87
ECC (Error Checking and Correction)......................................................................................................................................... 87
EDO (Extended Data Output) Memory........................................................................................................................................ 88
EEPROM (Electronic Erasable Programmable ROM) ................................................................................................................ 88
EPROM (Erasable Programmable ROM).................................................................................................................................... 88
EV6 Bus ...................................................................................................................................................................................... 88
FCC DoC (Declaration of Conformity)......................................................................................................................................... 89
FC-PGA (Flip Chip-Pin Grid Array).............................................................................................................................................. 89
Flash ROM .................................................................................................................................................................................. 89
FSB (Front Side Bus) Clock ........................................................................................................................................................ 89
2
C Bus ........................................................................................................................................................................................ 90
IEEE 1394 ................................................................................................................................................................................... 90
Parity Bit ...................................................................................................................................................................................... 90
PBSRAM (Pipelined Burst SRAM) .............................................................................................................................................. 91
PC100 DIMM............................................................................................................................................................................... 91
PC133 DIMM............................................................................................................................................................................... 91
6
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