Beckhoff CB3067 Originalbetriebsanleitung Seite 76

BIOS-Einstellungen
8.4.2.1 PCI Express Configuration (Q370)
Aptio Setup Utility - Copyright (C) 2020 American Megatrends, Inc.
Chipset
┌─────────────────────────────────────────────────────────────────┬────────────────────────────────┐
│ PCI Express Configuration │PCI Express Clock Gating │
│ │Enable/Disable for each root │
│ PCI Express Clock Gating [Disabled] │port. │
│ PCIE Port assigned to LAN 5 │ │
│ Peer Memory Write Enable [Disabled] │ │
│ Compliance Test Mode [Disabled] │ │
│ PCIe─USB Glitch W/A [Disabled] │ │
│ │ │
│ PCIE Port 5 is assigned to LAN1 │ │
│ PCI Express Root Port 9 │ │
│ PCI Express Root Port 10 │ │
│ PCI Express Root Port 11 │ │
│ PCI Express Root Port 12 ├────────────────────────────────┤
│ │→←: Select Screen │
│ │↑↓: Select Item │
│ │Enter: Select │
│ │+/─: Change Opt. │
│ │F1: General Help │
│ │F2: Previous Values │
│ │F3: Optimized Defaults │
│ │F4: Save & Reset │
│ │ESC: Exit │
│ │ │
└─────────────────────────────────────────────────────────────────┴────────────────────────────────┘
Version 2.20.1275. Copyright (C) 2020 American Megatrends, Inc.
Bios-Eintrag
PCI Express Configuration
PCI Express Clock Gating
PCIE Port assigned to LAN
Peer Memory Write Enable
Compliance Test Mode
PCIe-USB Glitch W/A
PCIE Port 5 is assigned to LAN1
PCI Express Root Port 9
PCI Express Root Port 10
PCI Express Root Port 11
PCI Express Root Port 12
76
Optionen
Disabled / Enabled
Keine
Disabled / Enabled
Disabled / Enabled
Disabled / Enabled
Keine
Disabled / Enabled
Disabled / Enabled
Disabled / Enabled
Disabled / Enabled
Version: 1.0 CB3067