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A
X
4
5
S
-
5
3
3
/
A
X
4
5
S
-
5
3
3
N
O
n
l
i
n
e
-
H
a
n
d
b
u
c
h
A
X
4
5
S
-
5
3
3
/
A
X
4
5
S
-
5
3
3
N
O
n
l
i
n
e
-
H
a
n
d
b
u
c
h
CODEC (Coding and Decoding) ................................................................................................................................................. 87
DDR (Double Data Rated) SDRAM............................................................................................................................................. 88
DIMM (Dual In Line Memory Module) ......................................................................................................................................... 88
DMA (Direct Memory Access) ..................................................................................................................................................... 88
ECC (Error Checking and Correction)......................................................................................................................................... 88
EDO (Extended Data Output) Memory........................................................................................................................................ 89
EEPROM (Electronic Erasable Programmable ROM) ................................................................................................................ 89
EPROM (Erasable Programmable ROM).................................................................................................................................... 89
EV6 Bus ...................................................................................................................................................................................... 89
FCC DoC (Declaration of Conformity)......................................................................................................................................... 90
FC-PGA (Flip Chip-Pin Grid Array).............................................................................................................................................. 90
Flash ROM .................................................................................................................................................................................. 90
FSB (Front Side Bus) Clock ........................................................................................................................................................ 90
2
C Bus ........................................................................................................................................................................................ 91
IEEE 1394 ................................................................................................................................................................................... 91
Parity Bit ...................................................................................................................................................................................... 91
PBSRAM (Pipelined Burst SRAM) .............................................................................................................................................. 92
PC100 DIMM............................................................................................................................................................................... 92
PC133 DIMM............................................................................................................................................................................... 92
6
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