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Technology of Q 2500 colour TV set
4.5.3
Movement detector
In the Y branch there is a movement detector.
Here current and previous half pictures are
compared with each other. An assessment is
made of whether it is a question of full pictures
in Cinema Scope format. The CCU receives
this information via the microprocessor for the
Automatic
Movie
movement detector is also responsible for the
setting of the noise suppression K factor.
In addition, using the movement from the pre-
vious to the current half picture an assess-
ment is made of how the movement between
the two half pictures could behave. In this
way, in the movement compensation stage
immediately following a new half picture can
be calculated. At the same time it must be
taken into account that the two half pictures,
contain the intermediate lines for the other half
picture respectively. In this way a continuous
process of movement over all half pictures is
achieved, both for horizontal as well as verti-
cal movements. The DMI (Digital Moving In-
terpolation) function is active for both full pic-
ture presentation and for standard video sig-
nals.
The operation of this switch is largely error
free. Nevertheless, under unfavourable condi-
tions negative effects can occur, therefore the
DMI function can be switched off. Instead, the
DLC (Digital Lineflicker Control) function is
switched on.
4.5.4
Memory control
Control of the SAA 4993 is implemented via
the µP interface from I 2311. The µP bus is
assigned to pins 26 (DA) and 27 (Cl). In addi-
tion it is here in conjunction with the Memory
Controller that writing to the 2nd picture mem-
ory and reading from the two memories is de-
termined.
Document Q 2500
Detection
(AMD).
4.6 SAA 4979 (BESIC)
The next IC in the signal path, the SAA 4974,
is designed for the following functions.
- Demultiplexer for luminance/chroma sepa-
ration
The
- 3.5Mbit memory for 50/100Hz conversion
- Cycle rate converter from 27MHz to
32MHZ
− Two signal paths for the separate process-
ing
of
− Demultiplexer
− Band width doubling and digital CTI circuit
for
− Peaking circuit Y branch to increase picture
sharpness
− Three blank stages for dark sampling
− Three 10 bit DACs for the generation of
analogue
I²C bus interface and timing control for the
control of the individual processes through
the microprocessor.
− Microprocessor bus for the control of the
SAA 4993.
− Control of write and read processes in the
half picture memory, as well as the total
digital 100 Hz video signal processing.
− Generation
− Generation of H and V synchronous pulses
for the TDA9332 video/deflection proces-
sor.
99
the
Y
and
chroma
for
the
chroma
improved
colour
R-Y-,
B-Y-
and
of
a
32
© Loewe ProCollege
signals
signals
transfer
Y-signals,
MHz
cycle.
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