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IO-Link Master mit EtherNet/IP-Schnittstelle PerformanceLine 8 Ports IP 65 / IP 66 / IP 67
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14.2.3
Zyklische Daten
Inhalt
Input Assembly (Instance 100): I/O + Acyclic + Diag ...........................................................................104
Input Assembly (Instance 102): I/O ......................................................................................................106
Input Assembly (Instance 103): I/O + Acyclic + Diag + EnMo .............................................................108
Output Assembly (Instance 150): I/O + Acyclic ....................................................................................114
Output Assembly (Instance 151): I/O ...................................................................................................115
>
Input Assembly (Instance 100): I/O + Acyclic + Diag
Byte
Bit 7
0
Port X8:
Pin 4
Port X8:
1
Pin 2
2
Port X8:
Short / OL
3
reserviert
4...45
Acyclic Command Area: Response Channel (→
46...47
Port X1: Port Qualifier Information (→
48...63
Port X1: Vendor-ID, Device ID, Events (→
64...65
Port X2: Port Qualifier Information (→
66...81
Port X2: Vendor-ID, Device ID, Events (→
82...83
Port X3: Port Qualifier Information (→
84...99
Port X3: Vendor-ID, Device ID, Events (→
100...101
Port X4: Port Qualifier Information (→
102...117
Port X4: Vendor-ID, Device ID, Events (→
118...119
Port X5: Port Qualifier Information (→
120...135
Port X5: Vendor-ID, Device ID, Events (→
136...137
Port X6: Port Qualifier Information (→
138...153
Port X6: Vendor-ID, Device ID, Events (→
154...155
Port X7: Port Qualifier Information (→
156...171
Port X7: Vendor-ID, Device ID, Events (→
172...173
Port X8: Port Qualifier Information (→
174...189
Port X8: Vendor-ID, Device ID, Events (→
190
190+n
190+2n
190+3n
104
Bit 6
Bit 5
Port X7:
Port X6:
Pin 4
Pin 4
Port X7:
Port X6:
Pin 2
Pin 2
Port X7:
Port X6:
Short / OL
Short / OL
reserviert
reserviert
Port X1: Input Data IO-Link (n Bytes)
Port X2: Input Data IO-Link (n Bytes)
Port X3: Input Data IO-Link (n Bytes)
Port X4: Input Data IO-Link (n Bytes)
Inhalt
Bit 4
Bit 3
Port X5:
Port X4:
Pin 4
Pin 4
Port X5:
reserviert
Pin 2
Port X5:
Port X4:
Short / OL
Short / OL
reserviert
reserviert
Antwortkanal (Response)
Mapping: Port Qualifier Information (PQI)
Mapping: Informationen + Events IO-Link Device
Mapping: Port Qualifier Information (PQI)
Mapping: Informationen + Events IO-Link Device
Mapping: Port Qualifier Information (PQI)
Mapping: Informationen + Events IO-Link Device
Mapping: Port Qualifier Information (PQI)
Mapping: Informationen + Events IO-Link Device
Mapping: Port Qualifier Information (PQI)
Mapping: Informationen + Events IO-Link Device
Mapping: Port Qualifier Information (PQI)
Mapping: Informationen + Events IO-Link Device
Mapping: Port Qualifier Information (PQI)
Mapping: Informationen + Events IO-Link Device
Mapping: Port Qualifier Information (PQI)
Mapping: Informationen + Events IO-Link Device
Bit 2
Bit 1
Port X3:
Port X2:
Pin 4
Pin 4
reserviert
reserviert
Port X3:
Port X2:
Short / OL
Short / OL
reserviert
Status
Sensor
Supply UA
(→ S. 118))
(→ S. 110))
(→ S. 111))
(→ S. 110))
(→ S. 111))
(→ S. 110))
(→ S. 111))
(→ S. 110))
(→ S. 111))
(→ S. 110))
(→ S. 111))
(→ S. 110))
(→ S. 111))
(→ S. 110))
(→ S. 111))
(→ S. 110))
(→ S. 111))
22429
56374
Bit 0
Port X1:
Pin 4
reserviert
Port X1:
Short / OL
Status
Sensor
Supply US
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