Fujitsu Answers2 D1607 Technisches Handbuch Seite 24

Pinbelegung interne Anschlüsse
IDE-Schnittstelle /
IDE interface
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Serial ATA (intern) / Serial ATA
(internal)
Pin
1
3
5
7
14 - Deutsch
Signal
Reset drive (low asserted)
GND
Data 7 (high asserted)
Data 8 (high asserted)
Data 6 (high asserted)
Data 9 (high asserted)
Data 5 (high asserted)
Data 10 (high asserted)
Data 4 (high asserted)
Data 11 (high asserted)
Data 3 (high asserted)
Data 12 (high asserted)
Data 2 (high asserted)
Data 13 (high asserted)
Data 1 (high asserted)
Data 14 (high asserted)
Data 0 (high asserted)
Data 15 (high asserted)
GND
Key
Signal
GND
Transmit data negative
Receive data negative
GND
2
1
Pin
21 DRQ (high asserted)
22
23 I/O write (low asserted)
24
25 I/O read (low asserted)
26
27 I/O ready (high asserted)
28
29 DAK (low asserted)
30
31 IRQ (high asserted)
32
33 ADR 1 (high asserted)
34 ATA 66 Detect (low
35 ADR 0 (high asserted)
36 ADR 2 (high asserted)
37 CS 1 (low asserted)
38 CS 3 (low asserted)
39 IDE-LED (low asserted)
40
Pin
2 Transmit data positive
4
6 Receive data positive
8
A26361-D1607-Z121-1-6319
Signal
GND
GND
GND
Cable select
GND
Not connected
asserted)
GND
1
Signal
GND
Key