Chipset
6.4.2.1.2 PCI Express Root Port
Aptio Setup Utility - Copyright (C) 2016 American Megatrends, Inc.
Chipset
┌─────────────────────────────────────────────────────────────────┬────────────────────────────────┐
│
PCI Express Root Port 1
│
Topology
│
ASPM Support
│
L1 Substates
│
Gen3 Eq Phase3 Method
│
UPTP
│
DPTP
│
ACS
│
URR
│
FER
│
NFER
│
CER
│
CTO
│
SEFE
│
SENFE
│
SECE
│
PME SCI
│
Hot Plug
│
Advanced Error Reporting
│
PCIe Speed
│
Transmitter Half Swing
│
Detect Non-Compliance Device
│
Extra Bus Reserved
│
Reserved Memory
│
Prefetchable Memory
│
└─────────────────────────────────────────────────────────────────┴────────────────────────────────┘
Version 2.18.1259. Copyright (C) 2016 American Megatrends, Inc.
PCI Express Root Port x
Optionen:
Disabled / Enabled
Topology
Optionen:
Unknown / x1 / x4 / Sata Express / M2
ASPM Support
Optionen:
Disabled / L0s / L1 / L0sL1 / Auto
L1 Substates
Optionen:
Disabled / L1.1 / L1.2 / L1.1 & L1.2
Gen3 Eq Phase3 Method
Optionen:
Hardware / Static Coeff. / Software Search
UPTP
Optionen:
0..10
DPTP
Optionen:
0..10
ACS
Optionen:
Enabled / Disabled
URR
Optionen:
Enabled / Disabled
FER
Optionen:
Enabled / Disabled
NFER
Optionen:
Enabled / Disabled
Beckhoff New Automation Technology CB3064-xxxx
[Enabled]
[Unknown]
[Auto]
[L1.1 & L1.2]
[Software Search]
5
7
[Enabled]
[Disabled]
[Disabled]
[Disabled]
[Disabled]
[Disabled]
[Disabled]
[Disabled]
[Disabled]
[Enabled]
[Disabled]
[Enabled]
[Auto]
[Disabled]
[Disabled]
0
10
10
Kapitel: BIOS-Einstellungen
▲│Control the PCI Express Root
█│Port.
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█│────────────────────────────────│
█│→←: Select Screen
█│↑↓: Select Item
█│Enter: Select
█│+/-: Change Opt.
█│F1: General Help
█│F2: Previous Values
█│F3: Optimized Defaults
█│F4: Save & Exit
█│ESC: Exit
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