Inhaltsverzeichnis
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A
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3
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3
9
4
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A
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3
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-
1
3
9
4
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n
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A
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3
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1
3
9
4
/
A
X
3
S
P
-
1
3
9
4
O
n
l
i
n
e
-
H
a
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b
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c
h
Bus Master IDE (DMA mode) ...................................................................................................................................... 102
CNR (Communication and Networking Riser).............................................................................................................. 103
CODEC (Coding and Decoding) .................................................................................................................................. 103
DDR (Double Data Rated) SDRAM ............................................................................................................................. 103
DIMM (Dual In Line Memory Module) .......................................................................................................................... 104
DMA (Direct Memory Access) ..................................................................................................................................... 104
ECC (Error Checking and Correction) ......................................................................................................................... 104
EDO (Extended Data Output) Memory ........................................................................................................................ 104
EEPROM (Electronic Erasable Programmable ROM).................................................................................................. 105
EPROM (Erasable Programmable ROM) .................................................................................................................... 105
EV6 Bus ...................................................................................................................................................................... 105
FCC DoC (Declaration of Conformity) ......................................................................................................................... 105
FC-PGA (Flip Chip-Pin Grid Array).............................................................................................................................. 106
Flash ROM .................................................................................................................................................................. 106
FSB (Front Side Bus) Clock ........................................................................................................................................ 106
2
I
C Bus ........................................................................................................................................................................ 106
IEEE 1394 ................................................................................................................................................................... 107
Parity Bit ..................................................................................................................................................................... 107
PBSRAM (Pipelined Burst SRAM)............................................................................................................................... 107
PC100 DIMM............................................................................................................................................................... 108
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