A
X
4
5
P
r
o
-
5
3
3
O
n
l
i
n
e
-
H
a
n
d
b
u
c
h
A
X
4
5
P
r
o
-
5
3
3
O
n
l
i
n
e
-
H
a
n
d
b
u
c
h
CODEC (Coding and Decoding) ............................................................................................................................................. 89
DDR (Double Data Rated) SDRAM......................................................................................................................................... 89
DIMM (Dual In Line Memory Module)...................................................................................................................................... 90
DMA (Direct Memory Access) ................................................................................................................................................. 90
EDO (Extended Data Output) Memory .................................................................................................................................... 90
EPROM (Erasable Programmable ROM) ................................................................................................................................ 91
EV6 Bus.................................................................................................................................................................................. 91
FC-PGA (Flip Chip-Pin Grid Array).......................................................................................................................................... 92
Flash ROM ............................................................................................................................................................................. 92
FSB (Front Side Bus) Clock .................................................................................................................................................... 92
2
C Bus ................................................................................................................................................................................... 92
IEEE 1394 .............................................................................................................................................................................. 93
Parity Bit ................................................................................................................................................................................. 93
PBSRAM (Pipelined Burst SRAM) .......................................................................................................................................... 93
PC100 DIMM .......................................................................................................................................................................... 94
6