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Grundig KM 13 Betriebsanleitung Seite 30

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Platinenabbildungen und Schaltpläne / Layout of PCBs and Circuit Diagrams
IC04 CXA2508Q
EMPHI
63
LRCK1
43
PGMDI
45
BCK1
47
MUTE
6
46
BCK
BCMD
44
LRCK
42
WDCK
41
D/A
C2PO
54
Interface
RFCK
52
MNT0
58
error
MNT1
57
corrector
MNT3
56
WFCK
64
EMPH
62
EFM
GFS
51
demodulator
XUGF
49
GTOP
48
asymmetry
clock
corrector
generator
59 60
36 38 39 40 37
IC103 LC7218
REFERENCE
XIN
1
DIVIDER
XOUT
24
1
SWALLOW COUNTER
FMIN
19
2
1/16, 1/17 4BIT
12 BIT PROGRAMMABLE
AMIN
18
DIVIDER
CE
2
SHIFT REGISTER
LATCH
DI
3
CL
4
DO
5
9
10
11
OUT0
OUT1
OUT2
OUT3
3 - 24
73 74
66 65
Digital Filter
+
1bit DAC
digital
OUT
digital
CLV
16K RAM
CPU
Interface
SUB code
Processor
Servo auto
digital
sequencer
PLL
50 29 30 31 34
23
13
14
SYC
6
LC7218
PHASE DETECTOR
CHARGE PUMP
UNIVERSAL
COUNTER
12
13
14
17
7
8
OUT4 OUT5 OUT6
IN0
IN1
IC03 BA5941FP
15
16
69 NLPWM
70 LPWM
78 RPWM
17
77 NRPWM
18
61 DOUT
19
Vcc
55 XROF
µC
20
27 LOCK
26 MDS
21
25 MDP
24 MON
5 SQCK
4 SQSO
3 EXCK
2 SBSO
22
1 SCOR
+
22 XLON
19 SPOB~D
23
11 CLOK
10 XLAT
9 DATA
24
7 SENS
10K
25
17 CLKO
26
16 XLTO
10K
15 DATO
27
28
IC02 TC9173P
CK
14
21
PD1
22
PD2
STB
15
16
HCTR
CONTROL CIRCUIT
C
16
V
DD
15
LCTR
1
GND
20
V
DD
I/O-1
2
23
Vss
(OP-1)
3
I/O-2
(OP-2)
Note: The name in ( ) is the terminal name for TC9174P/F.
20K
+
+
20K
20K
+
+
20K
19.9K
19.9K
19.9K
I/O-10
SI
SO
(OP-10)
13
12
11
SERIAL I/O
Y
LATCH
LATCH
DRIVER
4
5
6
I/O-3
I/O-4
I/O-5
(OP-3)
(OP-4)
(OP-5)
GRUNDIG Service
KM 13
20K
14
+
+
13
20K
20K
12
+
+
11
20K
Vcc
10
9
8
7
19.9K
10K
6
5
10K
4
3
2
Vcc
1
I/O-9
10
(OP-9)
I/O-8
9
(OP-8)
I/O-7
8
(OP-7)
I/O-6
7
(OP-6)

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