Grundig GDP 2200 Serviceanleitung Seite 23

GRUNDIG Service
Pin Pin Name
89 VCOF
90 TRCRS
91 CMPIN
92 LPFOUT
93 LPFIN
94 AVSSC
95 HPFOUT
96 FPFIN
97 CSLFLT
98 RFDIF
99 AVDDC
100 PLFLT2
101 PLFLT1
102 AVSSB
103 RVI
104 VREFH
105 PLPG
106 VHALF
107 DSLF2
108 DSLF1
109 AVDDB
110 NARF
111 ARF
112 JITOUT
113 AVSSA
114 DAC0
115 DAC1
116 AVDDA
117 AD0
118 AD1
119 AD2
120 AD3
121 AD4
122 AD5/CAPAC2
123 AD6/CAPAC1
124 TECAPA
125 VDD3
126 VSS
127 MONI0
128 MONI1
129 MONI2
130 MONI3
131 NEJECT
132 NTRYCL
133 NDASP
134 NCS3FX
135 NCS1FX
136 DA2
137 DA0
138 NPDIAG
139 DA1
140 NIOCS16
141 INTRQ
142 NDMACK
143 VDD3
144 VSS
145 IORDY
146 NIORD
147 NIOWR
148 DMARQ
149 HDD15
150 HDD0
151 HDD14
152 VDD18
153 P0
154 UATASEL
155 VSS
156 VDD3
157 HDD1
158 HDD13
159 HDD2
160 HDD12
161 HDD3
162 VDD3
163 VSS
164 HDD11
165 HDD4
166 HDD10
167 HDD5
168 HDD9
169 VDD3
170 VSS
171 HDD6
172 HDD8
173 HDD7
174 VDDH
175 NRESET
176 MASTER
I/O Function MN103S26E
I JFVCO control voltage
I Track cross generating signal Input
I WOBBLE comparator Input
O LPF output
I LPF Input
– Analog circuit ground
O HPF output
I HPF Input
I CPDET capacitor
I CPDET RF Input
– Analog circuit power supply (3.3V)
I PLL capacitor 2
I PLL capacitor 1
– Analog circuit ground
I VREFH reference current source resistor
I Reference voltage 2.2V Input
I PLL phase gain setting resistor
I Reference voltage 1.65V Input
I DSL capacitor 2
I DSL capacitor 1
– Analog circuit power supply (3.3V)
I Equivalent RF - Input
I Equivalent RF • Input
O Jitter signal monitor
– Analog circuit ground
O Tracking drive output
O Focus drive output
– Analog circuit power supply (3.3V)
I FE Input
AS Input
I TEph/TE3b/TEpp Input
I RF envelope Input
I Tangential phase difference Input
I Upper CAPA ENV Input/hold capacitor
I Lower CAPA ENV Input/hold capacitor
I CAPA tracking error signal
– I/O power supply (3.3V)
– Ground
O Internal signal monitor 0
O Internal signal monitor 1
O Internal signal monitor 2
O Internal signal monitor 3
I/O Eject detection
I/O Tray close detection
I/O ATAPI drive active / slave connection I/O
I ATAPI host chip selection
I ATAPI host chip selection
I/O ATAPI host address 2
I/O ATAPI host address 0
I/O ATAPI slave to master diagnostic I/O
I/O ATAPI host address 1
O ATAPI host data bus width selection output
O ATAPI host Interrupt request
I ATAPI host DMA acknowledge
– I/O power supply (3.3V)
– Ground
O ATAPI host ready output
I/O ATAPI host data read
I/O ATAPI host data write
O ATAPI host DMA request
I/O ATAPI host data 15
I/O ATAPI host data 0
I/O ATAPI host data 14
– I/O power supply (1.8V)
I (Fix to the ground)
I (Fix to the ground)
– Ground
– I/O power supply (3.3V)
I/O ATAPI host data 1
I/O ATAPI host data 13
I/O ATAPI host data 2
I/O ATAPI host data 12
I/O ATAPI host data 3
– I/O power supply (3.3V)
– Ground
I/O ATAPI host data 11
I/O ATAPI host data 4
I/O ATAPI host data 10
I/O ATAPI host data 5
I/O ATAPI host data 9
– I/O power supply (3.3V)
– Ground
I/O ATAPI host data 6
I/O ATAPI host data 8
I/O ATAPI host data 7
– ATAPI reference power supply (5.0V)
I ATAPI host reset Input
I ATAPI master / slave selection
2 - 19
Connected Device
–
FEP
–
–
–
–
–
–
–
–
–
–
–
–
–
FEP
–
FEP
–
–
–
FEP
FEP
–
–
DRVIC
DRVIC
–
FEP
FEP
FEP
FEP
FEP
FEP
FEP
–
–
–
–
–
–
MECA
MECA
HOST
HOST
HOST
HOST
HOST
HOST
HOST
HOST
HOST
HOST
–
–
HOST
HOST
HOST
HOST
HOST
HOST
HOST
–
–
–
–
–
HOST
HOST
HOST
HOST
HOST
–
–
HOST
HOST
HOST
HOST
HOST
–
–
HOST
HOST
HOST
–
HOST
HOST
GDP 2200