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GRUNDIG Service
Pin
Pin Name
1
NINT0
2
NINT1
3
VDD3
4
VSS
5
NINT2
6
WAITODC
7
NMRST
8
DASPST
9
CPUADR17
10
CPUADR16
11
CPUADR15
12
CPUADR14
13
CPUADR13
14
CPUADR12
15
CPUADR11
16
CPUADR10
17
CPUADR9
18
VDD18
19
VSS
20
DRAMVDD18
21
DRAMVSS
22
CPUADR8
23
CPUADR7
24
CPUADR6
25
CPUADR5
26
CPUADR4
27
CPUADR3
28
CPUADR2
29
CPUADR1
30
CPUADR0
31
VDD3
32
VSS
33
DRAMVDD33
34
NCS
35
NWR
36
NRD
37
CPUDT7
38
CPUDT6
39
CPUDT5
40
CPUDT4
41
CPUDT3
42
CPUDT2
43
CPUDT1
44
CPUDT0
45
CLKOUT
46
MMOD
47
NRST
48
MSTPOL
49
SCLOCK
50
SDATA
51
OFTR
52
BDO
53
PWM1
54
PWM2
55
PWM3
56
PWM4
57
VDD3
58
DRAMVDD18
59
DRAMVSS
60
VSS
61
PWM5
62
PWM6
63
PWM7
64
PWM8
65
TBAL
66
FBAL
67
TRSDRV
68
SPDRV
69
FG
70
TILTP
71
TILT
72
TILTN
73
TX
74
DTRD
75
IDGT
76
VDD18
77
VSS
78
VDD3
79
OSCI1
80
OSCO1
81
VSS
82
TSTSG
83
VFOSHORT
84
JLINE
85
AVSSD
86
ROUT
87
LOUT
88
AVDDD
I/O
Function MN103S26E
O
Systemcontroller interrupt signal 0
O
Systemcontroller interrupt signal 1
–
I/O power supply (3.3V)
–
Ground
O
Systemcontroller interrupt signal 2
O
Systemcontroller bus wait signal
O
Systemcontroller reset output
I
DASP signal initial value setting
I
Systemcontroller address 17
I
Systemcontroller address 16
I
Systemcontroller address 15
I
Systemcontroller address 14
I
Systemcontroller address 13
I
Systemcontroller address 12
I
Systemcontroller address 11
I
Systemcontroller address 10
I
Systemcontroller address 9
–
I/O power supply (1.8V)
–
Ground
–
DRAM power supply (1.8V)
–
DRAM ground
I
Systemcontroller address 8
I
Systemcontroller address 7
I
Systemcontroller address 6
I
Systemcontroller address 5
I
Systemcontroller address 4
I
Systemcontroller address 3
I
Systemcontroller address 2
I
Systemcontroller address 1
I
Systemcontroller address 0
–
I/O power supply (3.3V)
–
Ground
–
DRAM power supply (3.3V)
I
Systemcontroller chip selection signal
I
Systemcontroller write signal Input
I
Systemcontroller read signal Input
I/O
Systemcontroller data 7
I/O
Systemcontroller data 6
I/O
Systemcontroller data 5
I/O
Systemcontroller data 4
I/O
Systemcontroller data 3
I/O
Systemcontroller data 2
I/O
Systemcontroller data 1
I/O
Systemcontroller data 0
O
Systemcontroller clock output
I
Test mode selection signal
I
Reset
I
MASTER pin polarity selection Input
I/O
Debug serial clock
I/O
Debug serial data
I
Off track signal
I
Dropout signal Input
I/O
General-purpose PWM 1 output
I/O
General-purpose PWM 2 output
I/O
General-purpose PWM 3 output
I/O
General-purpose PWM 4 output
–
I/O power supply (3.3V)
–
DRAM power supply (1.8V)
–
DRAM ground
–
Ground
I/O
General-purpose PWM 5 output
I/O
General-purpose PWM 6 output
I/O
General-purpose PWM 7 output
I/O
General-purpose PWM 8 output
O
Tracking balance adjustment output
O
Focus balance adjustment output
O
Traverse drive output
O
Spindle drive output
I
Motor FG Input
O
Tilting drive plus (+) output
O
Tilting drive reference output
O
Tilting drive minus (-) output
O
Digital output signal
O
Data block frequency control selection signal
O
CAPA block selection signal
–
I/O power supply (1.8V)
–
Ground
–
I/O power supply (3.3V)
I
16.9MHz oscillation
O
16.9MHz oscillation
–
Ground
O
EQ calibration signal
O
VFO short-circuit output
O
J-line setting output
–
Analog circuit ground
O
MASH R-ch audio output
O
NASH L-ch audio output
–
Analog circuit power supply (3.3V)
2 - 18
Connected Device
SYSCON
SYSCON
–
–
SYSCON
SYSCON
SYSCON
HOST
SYSCON
SYSCON
SYSCON
SYSCON
SYSCON
SYSCON
SYSCON
SYSCON
SYSCON
–
–
–
–
SYSCON
SYSCON
SYSCON
SYSCON
SYSCON
SYSCON
SYSCON
SYSCON
SYSCON
–
–
–
SYSCON
SYSCON
SYSCON
SYSCON
SYSCON
SYSCON
SYSCON
SYSCON
SYSCON
SYSCON
SYSCON
SYSCON
–
Input RSTIC
–
–
–
Input EFP
EFP
–
–
–
–
–
–
–
–
–
–
–
–
FEP
FEP
DRVIC
DRVIC
DRVIC
Optical PU
Optical PU
Optical PU
–
FEP
FEP
–
–
–
Input
output
–
FEP
FEP
FEP
–
–
–
–
GDP 2200
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